PIC16LC62B-04I/SS Microchip Technology, PIC16LC62B-04I/SS Datasheet - Page 23
PIC16LC62B-04I/SS
Manufacturer Part Number
PIC16LC62B-04I/SS
Description
IC MCU OTP 2KX14 PWM 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC62B-04I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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3.3
PORTC is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (=1) will make the corresponding PORTC pin
an input, (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISC bit (=0) will
make the corresponding PORTC pin an output, (i.e.,
put the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 3-5). PORTC pins have Schmitt Trigger input
buffers.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override maybe
in effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
destination should be avoided. The user should refer to
the corresponding peripheral section for the correct
TRIS bit settings.
FIGURE 3-5:
PORT/PERIPHERAL Select
Peripheral Data Out
Data Bus
Note 1: I/O pins have diode protection to V
Peripheral input
Peripheral
OE
1999 Microchip Technology Inc.
WR
TRIS
WR
PORT
(3)
2: Port/Peripheral select signal selects between port
3: Peripheral OE (output enable) is only activated if
PORTC and the TRISC Register
data and peripheral output.
peripheral select is active.
RD
PORT
TRIS Latch
Data Latch
D
D
RD TRIS
CK
CK
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE)
Q
Q
Q
Q
0
1
(2)
Q
EN
D
Schmitt
Trigger
DD
V
V
N
P
and V
SS
DD
I/O
pin
SS
(1)
Preliminary
.
PIC16C62B/72A
DS35008B-page 23
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