PIC16LF872T-I/SS Microchip Technology, PIC16LF872T-I/SS Datasheet - Page 80
![IC MCU FLASH 2KX14 EE A/D 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16LF872T-I/SS
Manufacturer Part Number
PIC16LF872T-I/SS
Description
IC MCU FLASH 2KX14 EE A/D 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16C770-ISO.pdf
(8 pages)
2.PIC16F872-ISO.pdf
(168 pages)
3.PIC16F872-ISO.pdf
(5 pages)
4.PIC16F872-ISO.pdf
(6 pages)
Specifications of PIC16LF872T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16C770-ISO PDF datasheet
- PIC16F872-ISO PDF datasheet #2
- PIC16F872-ISO PDF datasheet #3
- PIC16F872-ISO PDF datasheet #4
- Current page: 80 of 168
- Download datasheet (3Mb)
PIC16F872
9.3
For standard mode I
resistors R
lowing parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices
The supply voltage limits the minimum value of resistor
R
at V
example, with a supply voltage of V
FIGURE 9-27:
DS30221C-page 78
p
(input current + leakage current).
, due to the specified minimum sink current of 3 mA
OL
Note:
max = 0.4V, for the specified output stages. For
Connection Considerations for I
Bus
p
and R
I
2
also connected.
C devices with input levels related to V
s
in Figure 9-27 depend on the fol-
2
SAMPLE DEVICE CONFIGURATION FOR I
C bus devices, the values of
SDA
SCL
Rp
DD
= 5V+10% and
Rp
DD
2
Rs
C
must have one common supply line to which the pull-up resistor is
V
DD
DEVICE
Rs
+ 10%
V
1.7 k
Figure 9-27. The desired noise margin of 0.1 V
the low level limits the maximum value of R
resistors are optional and used to improve ESD
susceptibility.
The bus capacitance is the total capacitance of wire,
connections, and pins. This capacitance limits the max-
imum value of R
(Figure 9-27).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register, and controls the slew rate
of the I/O pins when in I
OL
max = 0.4V at 3 mA, R
V
2
C BUS
DD
, as a function of R
p
, due to the specified rise time
C
b
2
© 2006 Microchip Technology Inc.
=10 - 400 pF
C mode (master or slave).
p min
= (5.5-0.4)/0.003 =
p
, is shown in
s
. Series
DD
for
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