PIC16C715-20I/SO Microchip Technology, PIC16C715-20I/SO Datasheet - Page 17

• Manufacturer Part Number: PIC16C715-20I/SO
• Description: IC MCU OTP 2KX14 A/D 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C715-20I/SO

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 13
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 13
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Digital: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.2.2.1
The STATUS register, shown in Figure 4-7, contains
the arithmetic status of the ALU, the RESET status and
the bank select bits for data memory.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper-three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
FIGURE 4-7:
Applicable Devices
1997 Microchip Technology Inc.
bit7
bit 7:
bit 6-5: RP1:RP0: Register Bank Select bits (used for direct addressing)
bit 4:
bit 3:
bit 2:
bit 0:
bit 1:
R/W-0
IRP
STATUS REGISTER
IRP: Register Bank Select bit (used for indirect addressing)
1 = Bank 2, 3 (100h - 1FFh)
0 = Bank 0, 1 (00h - FFh)
11 = Bank 3 (180h - 1FFh)
10 = Bank 2 (100h - 17Fh)
01 = Bank 1 (80h - FFh)
00 = Bank 0 (00h - 7Fh)
Each bank is 128 bytes
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)(for borrow the polarity is reversed)
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: Carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)
1 = A carry-out from the most significant bit of the result occurred
0 = No carry-out from the most significant bit of the result occurred
Note: For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of
the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order
bit of the source register.
R/W-0
RP1
STATUS REGISTER (ADDRESS 03h, 83h)
R/W-0
RP0
710 71 711 715
R-1
TO
R-1
PD
R/W-x
Z
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
STATUS register because these instructions do not
affect the Z, C or DC bits from the STATUS register. For
other instructions, not affecting any status bits, see the
"Instruction Set Summary."
R/W-x
DC
Note 1: For those devices that do not use bits IRP
Note 2: The C and DC bits operate as a borrow
R/W-x
and RP1 (STATUS<7:6>), maintain these
bits clear to ensure upward compatibility
with future products.
and digit borrow bit, respectively, in sub-
traction. See the SUBLW and SUBWF
instructions for examples.
C
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
PIC16C71X
read as ‘0’
DS30272A-page 17