PIC16F872T-I/SS Microchip Technology, PIC16F872T-I/SS Datasheet - Page 55
![IC MCU FLASH 2KX14 EE 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F872T-I/SS
Manufacturer Part Number
PIC16F872T-I/SS
Description
IC MCU FLASH 2KX14 EE 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F872-ISO.pdf
(168 pages)
5.PIC16F872-ISO.pdf
(5 pages)
6.PIC16F872-ISO.pdf
(6 pages)
Specifications of PIC16F872T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F872T-I/SS
Manufacturer:
MICROCHIP
Quantity:
1 450
REGISTER 9-2:
© 2006 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3-0
SSPCON: SYNC SERIAL PORT CONTROL REGISTER (ADDRESS: 14h)
bit 7
WCOL: Write Collision Detect bit
Master mode:
1 = A write to SSPBUF was attempted while the I
0 = No collision
Slave mode:
1 = SSPBUF register is written while still transmitting the previous word (must be cleared in software)
0 = No collision
In SPI mode:
1 = A new byte is received while SSPBUF holds previous data. Data in SSPSR is lost on overflow.
0 = No overflow
In I
1 = A byte is received while the SSPBUF is holding the previous byte. SSPOV is a "don’t care" in
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In SPI mode:
When enabled, these pins must be properly configured as input or output.
1 = Enables serial port and configures SCK, SDO, SDI, and SS as the source of the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
In I
When enabled, these pins must be properly configured as input or output.
1 = Enables the serial port and configures the SDA and SCL pins as the source of the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
In SPI mode:
1 = IDLE state for clock is a high level
0 = IDLE state for clock is a low level
In I
SCK release control
1 = Enable clock
0 = Holds clock low (clock stretch). (Used to ensure data setup time.)
In I
Unused in this mode
0000 = SPI Master mode, clock = F
0001 = SPI Master mode, clock = F
0010 = SPI Master mode, clock = F
0011 = SPI Master mode, clock = TMR2 output/2
0100 = SPI Slave mode, clock = SCK pin. SS pin control enabled.
0101 = SPI Slave mode, clock = SCK pin. SS pin control disabled. SS can be used as I/O pin.
0110 = I
0111 = I
1000 = I
1011 = I
1110 = I
1111 = I
1001, 1010, 1100, 1101 = reserved
Legend:
R = Readable bit
- n = Value at POR
SSPOV: Receive Overflow Indicator bit
SSPM3:SSPM0: Synchronous Serial Port Mode Select bits
WCOL
R/W-0
2
2
2
2
In Slave mode, the user must read the SSPBUF, even if only transmitting data, to avoid over-
flows. In Master mode, the overflow bit is not set since each operation is initiated by writing to
the SSPBUF register. (Must be cleared in software.)
C mode:
Transmit mode. (Must be cleared in software.)
C mode:
C slave mode:
C master mode:
enabled
enabled
2
2
2
2
2
2
C Slave mode, 7-bit address
C Slave mode, 10-bit address
C Master mode, clock = F
C Firmware Controlled Master mode (slave idle)
C Firmware Controlled Master mode, 7-bit address with START and STOP bit interrupts
C Firmware Controlled Master mode, 10-bit address with START and STOP bit interrupts
SSPOV
R/W-0
W = Writable bit
’1’ = Bit is set
SSPEN
R/W-0
OSC
OSC
OSC
OSC
R/W-0
/4
/16
/64
/ (4 * (SSPADD+1)
CKP
2
C conditions were not valid
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
SSPM3
R/W-0
SSPM2
R/W-0
PIC16F872
x = Bit is unknown
SSPM1
R/W-0
DS30221C-page 53
SSPM0
R/W-0
bit 0