PIC16LC771-I/SS Microchip Technology, PIC16LC771-I/SS Datasheet - Page 50
![IC MCU OTP 4KX14 A/D PWM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LC771-I/SS
Manufacturer Part Number
PIC16LC771-I/SS
Description
IC MCU OTP 4KX14 A/D PWM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC771-I/SS
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x12b
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16LC
No. Of I/o's
15
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
Core
PIC
Processor Series
PIC16LC
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
256 B
Data Rom Size
256 B
On-chip Adc
6
Number Of Programmable I/os
16
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Mounting Style
SMD/SMT
Height
1.75 mm
Interface Type
I2C, SPI, SSP
Length
7.2 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC16LC771I/SS
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PIC16C717/770/771
6.1.1
In this mode, Timer1 is being incremented via an exter-
nal source. Increments occur on a rising edge. After
Timer1 is enabled in Counter mode, the module must
first have a falling edge before the counter begins to
increment.
FIGURE 6-1:
FIGURE 6-2:
DS41120B-page 48
Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
T1CKI
(Initially high)
T1CKI
(Initially low)
RB6/T1OSO/T1CKI/P1C
RB7/T1OSI/P1D
Note: Arrows indicate counter increments.
First falling edge
of the T1ON enabled
TIMER1 COUNTER OPERATION
TIMER1 INCREMENTING EDGE
TIMER1 BLOCK DIAGRAM
Set flag bit
TMR1IF on
Overflow
First falling edge
of the T1ON enabled
TMR1H
T1OSC
TMR1
TMR1L
Oscillator(1)
T1OSCEN
Enable
Clock
Fosc/4
Internal
TMR1ON
on/off
TMR1CS
1
0
T1CKPS<1:0>
T1SYNC
Prescaler
1, 2, 4, 8
0
1
2
2002 Microchip Technology Inc.
Synchronized
clock input
Synchronize
SLEEP input
det
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