PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 9

• Manufacturer Part Number: PIC24F16KA102-I/SS
• Description: IC PIC MCU FLASH 16K 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 16KB (5.5K x 24)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 512 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1.5 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.4
3.4.1
The NVMCON register controls the Flash memory write
and erase operations. To program the device, set the
NVMCON register to select the type of erase operation
(see Table 3-2) or write operation (see Table 3-3). Set
the WR control bit (NVMCON<15>) to initiate the
program.
In ICSP mode, all programming operations are
self-timed. There is an internal delay between setting
and automatic clearing of the WR control bit when the
programming
Section 7.0 “AC/DC Characteristics and Timing
Requirements” for information on the delays
associated with various programming operations.
TABLE 3-2:
© 2008 Microchip Technology Inc.
4064h
404Ch
4068h
405Ah
4059h
4058h
4050h
405Ah
4059h
4058h
4054h
4058h
Note 1:
NVMCON
Value
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Flash Memory Programming in
ICSP Mode
PROGRAMMING OPERATIONS
The destination address decides the
region (code memory, data EEPROM
memory or Configuration register) of the
erased rows/words.
Erase the code memory and
Configuration registers (does not erase
programming executive code and
Device ID registers).
Erase the general segment and
Configuration bits associated with it.
Erase the boot segment and
Configuration bits associated with it.
Erase four rows of code memory.
Erase two rows of code memory.
Erase a row of code memory.
Erase the entire data EEPROM
memory and Configuration bits
associated with it.
Erase eight words of data EEPROM
memory.
Erase four words of data EEPROM
memory.
Erase one word of data EEPROM
memory.
Erase all the Configuration registers
(except the code-protect fuses).
Erase Configuration registers except
FBS and FGS.
operation
NVMCON VALUES FOR
ERASE OPERATIONS
Erase Operation
is complete.
Refer
Advance Information
to
TABLE 3-3:
3.4.2
The WR bit (NVMCON<15>) is used to start an erase
or write cycle. Initiate the programming cycle by setting
the WR bit.
All erase and write cycles are self-timed. The WR bit
should be polled to determine if the erase or write cycle
is completed. Start a programming cycle as follows:
3.5
To erase the program memory (all of code memory,
data memory and Configuration bits, including the
code-protect bits), set the NVMCON to 4064h and then
execute the programming cycle.
Figure 3-6 illustrates the ICSP programming process
for Bulk Erase. This process includes the ICSP
command code, which must be transmitted (for each
instruction), LSB first, using the PGCx and PGDx pins
(see Figure 3-2).
Table 3-4 provides the steps for executing serial
instruction for the Bulk Erase mode.
FIGURE 3-6:
4004h
4004h
4004h
Note 1:
NVMCON
Note:
Value
BSET
(1)
(1)
(1)
PIC24FXXKAXXX
Erasing Program Memory
The destination address decides the
region (code memory, data EEPROM
memory or Configuration register) of the
erased rows/words.
STARTING AND STOPPING A
PROGRAMMING CYCLE
Program memory must be erased before
writing any data to program memory.
Write one Configuration register.
Program one row (32 instruction words)
of code memory or executive memory.
Program one word of data EEPROM
memory.
Set the WR bit to Initiate Erase
Write 4064h to NVMCON SFR
NVMCON, #WR
Delay P11 + P10 Time
NVMCON VALUES FOR
WRITE OPERATIONS
BULK ERASE FLOW
Write Operation
Start
End
DS39919A-page 9