PIC16LC717-E/SO Microchip Technology, PIC16LC717-E/SO Datasheet - Page 17
![IC MCU OTP 2KX14 A/D PWM 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16LC717-E/SO
Manufacturer Part Number
PIC16LC717-E/SO
Description
IC MCU OTP 2KX14 A/D PWM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC717-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16LC717E/SO
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2.2.2.2
The OPTION_REG register is a readable and writable
register, which contains various control bits to configure
the TMR0 prescaler/WDT postscaler (single assign-
able register known also as the prescaler), the External
INT Interrupt, TMR0 and the weak pull-ups on PORTB.
REGISTER 2-2:
2002 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
OPTION_REG REGISTER
OPTION REGISTER (OPTION_REG: 81h, 181h)
RBPU: PORTB Pull-up Enable bit
1 = PORTB weak pull-ups are disabled
0 = PORTB weak pull-ups are enabled by the WPUB register
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RB0/INT pin
0 = Interrupt on falling edge of RB0/INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on RA4/T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA4/T0CKI pin
0 = Increment on low-to-high transition on RA4/T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
bit 7
Legend:
R = Readable bit
- n = Value at POR
R/W-1
RBPU
Note 1: Individual weak pull-up on RB pins can be enabled/disabled from the weak pull-up
Bit Value
PORTB Register (WPUB).
INTEDG
000
001
010
011
100
101
110
111
R/W-1
TMR0 Rate
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
T0CS
W = Writable bit
’1’ = Bit is set
(1)
WDT Rate
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
R/W-1
T0SE
Note:
PIC16C717/770/771
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-1
To achieve a 1:1 prescaler assignment for
the TMR0 register, assign the prescaler to
the Watchdog Timer.
PSA
R/W-1
PS2
x = Bit is unknown
R/W-1
PS1
DS41120B-page 15
R/W-1
PS0
bit 0
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