PIC16C622A-20/P Microchip Technology, PIC16C622A-20/P Datasheet - Page 23

• Manufacturer Part Number: PIC16C622A-20/P
• Description: IC MCU OTP 2KX14 COMP 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C622A-20/P

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 13
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 13
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 1
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 22.86 mm
• Supply Voltage (max): 6 V
• Supply Voltage (min): 3 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

4.2.2.4
This register contains the individual enable bit for the
comparator interrupt.
REGISTER 4-4:
4.2.2.5
This register contains the individual flag bit for the
comparator interrupt.
REGISTER 4-5:
 2003 Microchip Technology Inc.
Note:
bit 7
bit 6
bit 5-0
bit 7
bit 6
bit 5-0
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User
software should ensure the appropriate
interrupt flag bits are clear prior to enabling
an interrupt.
PIE1 Register
PIR1 Register
PIE1 REGISTER (ADDRESS 8CH)
PIR1 REGISTER (ADDRESS 0CH)
bit 7
Unimplemented: Read as '0'
CMIE: Comparator Interrupt Enable bit
1 = Enables the Comparator interrupt
0 = Disables the Comparator interrupt
Unimplemented: Read as '0'
bit 7
Unimplemented: Read as '0'
CMIF: Comparator Interrupt Flag bit
1 = Comparator input has changed
0 = Comparator input has not changed
Unimplemented: Read as '0'
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
U-0
U-0
—
—
R/W-0
R/W-0
CMIE
CMIF
U-0
U-0
—
—
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
U-0
—
—
U-0
U-0
—
—
PIC16C62X
x = Bit is unknown
x = Bit is unknown
U-0
U-0
—
—
DS30235J-page 21
U-0
U-0
—
—
bit 0
bit 0