ATMEGA32U2-AUR Atmel, ATMEGA32U2-AUR Datasheet - Page 196
![MCU AVR 32K FLASH 16MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA32U2-AUR
Manufacturer Part Number
ATMEGA32U2-AUR
Description
MCU AVR 32K FLASH 16MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32U2-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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20.10.3
7799D–AVR–11/10
REGCR – Regulator Control Register
buffers.
Table 20-2.
• Bit 5:4 – UPDRV[1:0]: USB direct drive values
These bits are relevant only when one of the direct drive modes for USB is enable. When
UPWE[1:0] is 1:0 the values of these bits are output to USB.
The value written to UPDRV1 is output to D+.
The value written to UPDRV0 is output to D-.
• Bits 3:2 – Res: Reserved
These bits are reserved and should always read as zero.
• Bit 1 – DPI: D+ Input value
This bit is read only, the value read from this bit reflects the D+ pin (USB buffer). This bit is set
one by hardware if a one logic level is read on D+. This bit is set to zero by hardware if a zero
logic level is read on D+.
• Bit 0 – DMI: D- Input value
This bit is read only, the value read from this bit reflects the D- pin (USB buffer). This bit is set
one by hardware if a logic one is read on D-. This bit is set to zero by hardware if a logic zero
logic is read on D-.
• Bit 0 – REGDIS: Regulator Disable
Writing this bit to a logic one disables the internal 3.3V regulator. Writing this bit to a logic zero
enables the regulstor.
Bit
(0x63)
Read/Write
Initial Value
UPWE1
0
0
1
1
UPWE[I:0] Bits Settings
R
7
0
-
R
6
0
-
UPWE0
R
5
0
-
0
1
0
1
R
4
0
-
Direct drive is disabled.
Reserved
Direct drive of DP/DM (UPDRV[1:0] values)
Reserved
Mode
ATmega8U2/16U2/32U2
R
3
0
-
R
2
0
-
R
1
0
-
REGDIS
R/W
0
0
REGCR
196
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