PIC16LC771/SS Microchip Technology, PIC16LC771/SS Datasheet - Page 23
![IC MCU OTP 4KX14 A/D PWM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LC771/SS
Manufacturer Part Number
PIC16LC771/SS
Description
IC MCU OTP 4KX14 A/D PWM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC771/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 23 of 220
- Download datasheet (4Mb)
2.2.2.8
The Power Control (PCON) register contains a flag bit
to allow differentiation between a Power-on Reset
(POR) to an external MCLR Reset or WDT Reset.
Those devices with brown-out detection circuitry con-
tain an additional bit to differentiate a Brown-out Reset
condition from a Power-on Reset condition.
The PCON register also contains the frequency select
bit of the INTRC or ER oscillator.
REGISTER 2-8:
2002 Microchip Technology Inc.
bit 7-4
bit 3
bit 2
bit 1
bit 0
PCON REGISTER
POWER CONTROL REGISTER (PCON: 8Eh)
Unimplemented: Read as '0'
OSCF: Oscillator Speed bit
INTRC Mode
1 = 4 MHz nominal
0 = 37 kHz nominal
ER Mode
1 = Oscillator frequency depends on the external resistor value on the OSC1 pin.
0 = 37 kHz nominal
All other modes
x = Ignored
Unimplemented: Read as '0'
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit (See Section 2.2.2.8 Note)
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
bit 7
Legend:
R = Readable bit
- n = Value at POR
U-0
—
U-0
—
U-0
—
W = Writable bit
’1’ = Bit is set
U-0
—
Note:
PIC16C717/770/771
R/W-1
OSCF
q = Value depends on conditions
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
BOR is unknown on Power-on Reset. It
must then be set by the user and checked
on subsequent RESETS to see if BOR is
clear, indicating a brown-out has occurred.
The BOR status bit is a don’t care and is
not necessarily predictable if the brown-out
circuit is disabled (by clearing the BODEN
bit in the Configuration word).
U-0
—
x = Bit is unknown
R/W-q
POR
DS41120B-page 21
R/W-q
BOR
bit 0
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