PIC12CE674-10E/P Microchip Technology, PIC12CE674-10E/P Datasheet - Page 311

no-image

PIC12CE674-10E/P

Manufacturer Part Number
PIC12CE674-10E/P
Description
IC MCU OTP 2KX14 A/D&EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12CE674-10E/P

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
16Byte
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
1
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12CE674-10E/P
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC12CE674-10E/P
Manufacturer:
MICROCHIP
Quantity:
12 000
17.4.10.1 WCOL Status Flag
1997 Microchip Technology Inc.
If the user writes the SSPBUF when a Repeated Start sequence is in progress, then WCOL is
set and the contents of the buffer are unchanged (the write doesn’t occur).
Figure 17-22: Repeat Start Condition Waveform
Note:
Falling edge of ninth clock
SDA
SCL
Because queueing of events is not allowed, writing of the lower 5 bits of SSPCON2
is disabled until the Repeated Start condition is complete.
End of Xmit
Write to SSPCON2
occurs here.
SDA = 1,
SCL(no change)
Preliminary
T
SDA = 1,
SCL = 1
BRG
T
BRG
Section 17. MSSP
Sr = Repeated Start
T
BRG
At completion of start bit,
hardware clear RSEN bit
Set S (SSPSTAT<3>)
and set SSPIF
Write to SSPBUF occurs here.
T
BRG
1st Bit
T
BRG
DS31017A-page 17-35
17

Related parts for PIC12CE674-10E/P