ATTINY2313-20SU Atmel, ATTINY2313-20SU Datasheet - Page 52

IC MCU AVR 2K FLASH 20SOIC

ATTINY2313-20SU

Manufacturer Part Number
ATTINY2313-20SU
Description
IC MCU AVR 2K FLASH 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY2313-20SU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Cpu Family
ATtiny
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/USART/USI
Total Internal Ram Size
128Byte
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
SOIC
Package
20SOIC
Family Name
ATtiny
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
18
Number Of Timers
2
Processor Series
ATTINY2x
Core
AVR8
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Data Rom Size
128 B
Height
2.35 mm
Length
13 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7.6 mm
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Compliant

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52
ATtiny2313
Table 23. Generic Description of Overriding Signals for Alternate Functions
The following subsections shortly describe the alternate functions for each port, and relate the
overriding signals to the alternate function. Refer to the alternate function description for further
details.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Full Name
Pull-up Override
Enable
Pull-up Override
Value
Data Direction
Override Enable
Data Direction
Override Value
Port Value
Override Enable
Port Value
Override Value
Port Toggle
Override Enable
Digital Input
Enable Override
Enable
Digital Input
Enable Override
Value
Digital Input
Analog
Input/Output
Description
If this signal is set, the pull-up enable is controlled by the
PUOV signal. If this signal is cleared, the pull-up is
enabled when {DDxn, PORTxn, PUD} = 0b010.
If PUOE is set, the pull-up is enabled/disabled when
PUOV is set/cleared, regardless of the setting of the
DDxn, PORTxn, and PUD Register bits.
If this signal is set, the Output Driver Enable is controlled
by the DDOV signal. If this signal is cleared, the Output
driver is enabled by the DDxn Register bit.
If DDOE is set, the Output Driver is enabled/disabled
when DDOV is set/cleared, regardless of the setting of
the DDxn Register bit.
If this signal is set and the Output Driver is enabled, the
port value is controlled by the PVOV signal. If PVOE is
cleared, and the Output Driver is enabled, the port Value
is controlled by the PORTxn Register bit.
If PVOE is set, the port value is set to PVOV, regardless
of the setting of the PORTxn Register bit.
If PTOE is set, the PORTxn Register bit is inverted.
If this bit is set, the Digital Input Enable is controlled by
the DIEOV signal. If this signal is cleared, the Digital Input
Enable is determined by MCU state (Normal mode, sleep
mode).
If DIEOE is set, the Digital Input is enabled/disabled when
DIEOV is set/cleared, regardless of the MCU state
(Normal mode, sleep mode).
This is the Digital Input to alternate functions. In the
figure, the signal is connected to the output of the schmitt
trigger but before the synchronizer. Unless the Digital
Input is used as a clock source, the module with the
alternate function will use its own synchronizer.
This is the Analog Input/output to/from alternate
functions. The signal is connected directly to the pad, and
can be used bi-directionally.
2543L–AVR–08/10

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