DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 165

IC DSPIC MCU/DSP 12K 28SSOP

DSPIC33FJ12GP202-I/SS

Manufacturer Part Number
DSPIC33FJ12GP202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28SSOP
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
REGISTER 18-1:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-11
bit 10
bit 9-8
bit 7-5
bit 4
bit 3
R/W-0
ADON
R/W-0
ADON: ADC Operating Mode bit
1 = ADC module is operating
0 = ADC is off
Unimplemented: Read as ‘0’
ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
AD12B: 10-bit or 12-bit Operation Mode bit
1 = 12-bit, 1-channel ADC operation
0 = 10-bit, 4-channel ADC operation
FORM<1:0>: Data Output Format bits
For 10-bit operation:
11 = Signed fractional (D
10 = Fractional (D
01 = Signed integer (D
00 = Integer (D
For 12-bit operation:
11 = Signed fractional (D
10 = Fractional (D
01 = Signed Integer (D
00 = Integer (D
SSRC<2:0>: Sample Clock Source Select bits
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = Reserved
101 = Motor Control PWM2 interval ends sampling and starts conversion
100 = Reserved
011 = Motor Control PWM1 interval ends sampling and starts conversion
010 = GP timer 3 compare ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing sample bit ends sampling and starts conversion
Unimplemented: Read as ‘0’
SIMSAM: Simultaneous Sample Select bit (applicable only when CHPS<1:0> = 01 or 1x)
When AD12B = 1, SIMSAM is: U-0, Unimplemented, Read as ‘0’
1 = Samples CH0, CH1, CH2, CH3 simultaneously (when CHPS<1:0> = 1x); or
0 = Samples multiple channels individually in sequence
SSRC<2:0>
R/W-0
Samples CH0 and CH1 simultaneously (when CHPS<1:0> = 01)
U-0
AD1CON1: ADC1 CONTROL REGISTER 1
HC = Cleared by hardware
W = Writable bit
‘1’ = Bit is set
OUT
OUT
ADSIDL
R/W-0
R/W-0
OUT
OUT
= 0000 00dd dddd dddd)
= 0000 dddd dddd dddd)
= dddd dddd dd00 0000)
= dddd dddd dddd 0000)
OUT
OUT
OUT
OUT
= ssss sssd dddd dddd, where s = .NOT.d<9>)
= ssss sddd dddd dddd, where s = .NOT.d<11>)
= sddd dddd dd00 0000, where s = .NOT.d<9>)
= sddd dddd dddd 0000, where s = .NOT.d<11>)
Preliminary
U-0
U-0
dsPIC33FJ12GP201/202
HS = Set by hardware
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SIMSAM
R/W-0
U-0
AD12B
ASAM
R/W-0
R/W-0
x = Bit is unknown
HC,HS
R/W-0
R/W-0
SAMP
FORM<1:0>
DS70264D-page 163
HC, HS
DONE
R/W-0
R/C-0
bit 8
bit 0

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