ATMEGA168V-10MUR Atmel, ATMEGA168V-10MUR Datasheet - Page 345
ATMEGA168V-10MUR
Manufacturer Part Number
ATMEGA168V-10MUR
Description
MCU AVR 16KB FLASH 10MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATAVRTS2080B.pdf
(378 pages)
Specifications of ATMEGA168V-10MUR
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Note:
2545S–AVR–07/10
0x0D (0x2D)
0x0C (0x2C)
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0B (0x2B)
0x0A (0x2A)
Address
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x0 (0x20)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. Only valid for ATmega88/168
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATmega48/88/168 is a
complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the
IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
PORTD
PORTC
PORTB
PCIFR
DDRD
DDRC
TIFR2
TIFR1
TIFR0
DDRB
PIND
PINC
PINB
PORTD7
PORTB7
Bit 7
PIND7
PINB7
DDD7
DDB7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD6
PORTC6
PORTB6
Bit 6
PIND6
PINC6
PINB6
DDD6
DDC6
DDB6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD5
PORTC5
PORTB5
Bit 5
PIND5
PINC5
PINB5
DDD5
DDC5
DDB5
ICF1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD4
PORTC4
PORTB4
Bit 4
PIND4
PINC4
PINB4
DDD4
DDC4
DDB4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD3
PORTC3
PORTB3
Bit 3
PIND3
PINC3
PINB3
DDD3
DDC3
DDB3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD2
PORTC2
PORTB2
OCF2B
OCF1B
OCF0B
PIND2
PINC2
Bit 2
PCIF2
PINB2
DDD2
DDC2
DDB2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD1
PORTC1
PORTB1
ATmega48/88/168
OCF2A
OCF1A
OCF0A
Bit 1
PCIF1
PIND1
PINC1
PINB1
DDD1
DDC1
DDB1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD0
PORTC0
PORTB0
Bit 0
PIND0
PINC0
PINB0
PCIF0
DDD0
DDC0
TOV2
TOV1
TOV0
DDB0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Page
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345
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