PIC16F690-I/ML Microchip Technology, PIC16F690-I/ML Datasheet - Page 34

• Manufacturer Part Number: PIC16F690-I/ML
• Description: IC PIC MCU FLASH 4KX14 20QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F690-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/SSP/EUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-1, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20QFN-1 - SOCKET TRANSITION 20DIP-20QFNAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNPIC16F690DM-PCTLHS - BOARD DEMO PICTAIL HUMIDITY SNSRAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F631/677/685/687/689/690
TABLE 2-1:
DS41262D-page 32
Addr
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
PWM1CON
ECCPAS
ADRESH
ADCON0
1:
2:
3:
4:
5:
6:
7:
Name
—
—
—
(3)
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
MCLR and WDT Reset do not affect the previous value data latch. The RABIF bit will be cleared upon Reset but will set again if the
mismatch exists.
PIC16F687/PIC16F689/PIC16F690 only.
PIC16F685/PIC16F690 only.
PIC16F677/PIC16F685/PIC16F687/PIC16F689/PIC16F690 only.
PIC16F677/PIC16F687/PIC16F689/PIC16F690 only.
When SSPCON register bits SSPM<3:0> = 1001, any reads or writes to the SSPADD SFR address are accessed through the SSPMSK
register. See Registers 13-2 and 13-3 for more detail.
Port pins with analog functions controlled by the ANSEL and ANSELH registers will read ‘0’ immediately after a Reset even though the
data latches are either undefined (POR) or unchanged (other Resets).
(2)
(7)
(3)
(7)
(7)
(2)
(2)
(5)
(3)
(3)
(3)
(4)
(4)
(5, 6)
(3)
(3)
PIC16F631/677/685/687/689/690 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register 1 (LSB)
Capture/Compare/PWM Register 1 (MSB)
EUSART Transmit Data Register
EUSART Receive Data Register
Unimplemented
ECCPASE ECCPAS2 ECCPAS1
A/D Result Register High Byte
T1GINV
PRSEN
OSFIF
WCOL
ADFM
P1M1
SPEN
Bit 7
RB7
RC7
GIE
IRP
—
—
—
—
TOUTPS3 TOUTPS2
TMR1GE
SSPOV
ADIF
VCFG
P1M0
PDC6
PEIE
Bit 6
C2IF
RP1
RB6
RC6
RX9
—
—
(4)
T1CKPS1
RCIF
SSPEN
DC1B1
SREN
PDC5
CHS3
Bit 5
C1IF
RC5
T0IE
RP0
RA5
RB5
—
(2)
Write Buffer for upper 5 bits of Program Counter
TOUTPS1
ECCPAS0
T1CKPS0
TXIF
DC1B0
CREN
PDC4
CHS2
INTE
Bit 4
EEIF
RA4
RB4
RC4
CKP
TO
(2)
T1OSCEN
TOUTPS0
CCP1M3
PSSAC1
SSPIF
ADDEN
SSPM3
RABIE
PDC3
CHS1
Bit 3
RC3
RA3
PD
—
—
(5)
CCP1IF
TMR2ON
T1SYNC
CCP1M2
PSSAC0
SSPM2
FERR
CHS0
PDC2
Bit 2
T0IF
RA2
RC2
—
—
Z
(3)
GO/DONE
TMR2IF
T2CKPS1 T2CKPS0 -000 0000
TMR1CS
CCP1M1
PSSBD1
SSPM1
OERR
PDC1
Bit 1
INTF
RC1
RA1
DC
—
—
(3)
© 2007 Microchip Technology Inc.
TMR1ON 0000 0000
CCP1M0
RABIF
PSSBD0
TMR1IF
SSPM0
ADON
RX9D
PDC0
Bit 0
RC0
RA0
—
—
C
(1)
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--xx xxxx
xxxx ----
xxxx xxxx
---0 0000
0000 000x
-000 0000
0000 ----
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 000x
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
0000 0000
POR, BOR
Value on
—
—
—
178,201
177,201
128,201
128,201
127,201
159,201
144,201
141,201
115,201
113,201
44,201
81,201
44,201
36,201
44,201
59,201
69,201
76,201
44,201
38,201
41,201
42,201
86,201
86,201
88,201
91,201
92,201
Page
151
154
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—
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