PIC16C54-XT/P Microchip Technology, PIC16C54-XT/P Datasheet - Page 49
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PIC16C54-XT/P
Manufacturer Part Number
PIC16C54-XT/P
Description
IC MCU OTP 512X12 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C54-XT/P
Core Size
8-Bit
Program Memory Size
768B (512 x 12)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
12
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6.25 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
12
Ram Memory Size
25Byte
Cpu Speed
4MHz
No. Of Timers
1
Package
18PDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
4 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
12
Number Of Timers
1
Core
PIC
Processor Series
PIC16C
Maximum Clock Frequency
40 MHz
Data Ram Size
25 B
Data Rom Size
512 B
Mounting Style
Through Hole
Height
3.3 mm
Length
22.86 mm
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Supply Voltage (max)
6.25 V
Supply Voltage (min)
3 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C54-XT/P
Manufacturer:
MICROCHI
Quantity:
25
Company:
Part Number:
PIC16C54-XT/P
Manufacturer:
ST
Quantity:
110
Part Number:
PIC16C54-XT/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
9.3
A device may be powered down (SLEEP) and later
powered up (Wake-up from SLEEP).
9.3.1
The Power-down mode is entered by executing a
SLEEP instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit (STATUS<3>) is cleared and the oscillator driver is
turned off. The I/O ports maintain the status they had
before the SLEEP instruction was executed (driving
high, driving low, or hi-impedance).
It should be noted that a RESET generated by a WDT
time-out does not drive the MCLR/V
For lowest current consumption while powered down,
the T0CKI input should be at V
MCLR/V
(MCLR = V
9.3.2
The device can wake up from SLEEP through one of
the following events:
1.
2.
Both of these events cause a device RESET. The TO
and PD bits can be used to determine the cause of
device RESET. The TO bit is cleared if a WDT time-
out occurred (and caused wake-up). The PD bit, which
is set on power-up, is cleared when SLEEP is invoked.
The WDT is cleared when the device wakes from
SLEEP, regardless of the wake-up source.
2002 Microchip Technology Inc.
An external RESET input on MCLR/V
A Watchdog Timer Time-out Reset (if WDT was
enabled).
PP
Power-Down Mode (SLEEP)
IH
pin must be at a logic high level
SLEEP
WAKE-UP FROM SLEEP
).
DD
PP
or V
pin low.
PP
SS
pin.
and the
Preliminary
9.4
If the code protection bit(s) have not been pro-
grammed, the on-chip program memory can be read
out for verification purposes.
9.5
Four memory locations are designated as ID locations
where the user can store checksum or other code-iden-
tification numbers. These locations are not accessible
during normal execution but are readable and writable
during program/verify.
Use only the lower 4 bits of the ID locations and always
program the upper 8 bits as ’1’s.
Note:
Note:
Program Verification/Code
Protection
ID Locations
Microchip does not recommend code pro-
tecting windowed devices.
Microchip will assign a unique pattern
number for QTP and SQTP requests and
for ROM devices. This pattern number will
be unique and traceable to the submitted
code.
PIC16C5X
DS30453D-page 47