PIC16LF1938-I/SS Microchip Technology, PIC16LF1938-I/SS Datasheet - Page 36
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PIC16LF1938-I/SS
Manufacturer Part Number
PIC16LF1938-I/SS
Description
IC MCU 8BIT FLASH 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1938-I/SS
Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF1938-I/SS
Manufacturer:
MICROCHIP
Quantity:
3 180
Part Number:
PIC16LF1938-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F193X/LF193X/PIC16F194X/LF194X/
7.4
The checksum is calculated by two different methods
dependent on the setting of the CP Configuration bit.
TABLE 7-1:
EXAMPLE 7-1:
DS41397B-page 36
PIC16F1933
PIC16LF1933
PIC16F1934
PIC16LF1934
PIC16F1936
PIC16LF1936
PIC16F1937
PIC16LF1937
PIC16F1938
PIC16LF1938
PIC16F1939
PIC16LF1939
PIC16F1946
PIC16LF1946
PIC16F1947
PIC16LF1947
PIC16LF1902
PIC16LF1903
PIC16LF1904
PIC16LF1906
PIC16LF1907
PIC16F1936
Note 1: In PIC16F194X devices, the VCAPEN<1> bit is not implemented in Configuration Word 2 and the
Device
Checksum Computation
Configuration Word 2 mask is 3713h.
CONFIGURATION WORD
MASK VALUES
Sum of Memory addresses 0000h-1FFFh
Configuration Word 1
Configuration Word 1 mask
Configuration Word 2
Configuration Word 2 mask
Checksum
Config. Word 1
CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION DISABLED
PIC16F1936, BLANK DEVICE
0EFBh
0EFBh
0EFBh
0EFBh
0EFBh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
Mask
Config. Word 2
= E000h + (3FFFh and 3FFFh) + (3FFFh and 3733h)
= E000h + 3FFFh + 3733h
= 5732h
3E03h
3E03h
3E03h
3E03h
3E03h
3733h
3703h
3733h
3703h
3733h
3703h
3733h
3703h
3733h
3703h
3733h
3703h
3733h
3703h
3713h
3703h
Mask
(1)
7.4.1
With the program code protection disabled, the
checksum is computed by reading the contents of the
PIC16F193X/LF193X/PIC16F194X/LF194X/
PIC16LF190X program memory locations and adding
up the program memory data starting at address 0000h,
up to the maximum user addressable location (e.g.,
1FFFH for the PIC16F1936). Any Carry bit exceeding
16 bits are ignored. Additionally, the relevant bits of the
Configuration Words are added to the checksum. All
unimplemented Configuration bits are masked to ‘0’.
Note:
E000h
3FFFh
3FFFh
3FFFh
3733h
PROGRAM CODE PROTECTION
DISABLED
Data
checksum.
memory
2010 Microchip Technology Inc.
does
not
effect
the