PIC18F13K22-I/SS Microchip Technology, PIC18F13K22-I/SS Datasheet - Page 267

• Manufacturer Part Number: PIC18F13K22-I/SS
• Description: IC MCU 8BIT 8KB FLASH 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K22-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, MSSP, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 22-6:
REGISTER 22-7:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5-0
R/C-1
CPD
U-0
—
Unimplemented: Read as ‘0’
CP1: Code Protection bit
1 = Block 1 not code-protected
0 = Block 1 code-protected
CP0: Code Protection bit
1 = Block 0 not code-protected
0 = Block 0 code-protected
CPD: Data EEPROM Code Protection bit
1 = Data EEPROM not code-protected
0 = Data EEPROM code-protected
CPB: Boot Block Code Protection bit
1 = Boot block not code-protected
0 = Boot block code-protected
Unimplemented: Read as ‘0’
R/C-1
CPB
U-0
—
CONFIG5L: CONFIGURATION REGISTER 5 LOW
CONFIG5H: CONFIGURATION REGISTER 5 HIGH
U-0
U-0
—
—
U-0
U-0
Preliminary
—
—
PIC18F1XK22/LF1XK22
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U-0
U-0
—
—
U-0
U-0
—
—
R/C-1
CP1
U-0
—
DS41365D-page 267
R/C-1
CP0
U-0
—
bit 0
bit 0