PIC16F1936-I/SO Microchip Technology, PIC16F1936-I/SO Datasheet - Page 8

• Manufacturer Part Number: PIC16F1936-I/SO
• Description: IC PIC MCU FLASH 512KX14 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1936-I/SO

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, MI2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• A/d Bit Size: 10 bit
• A/d Channels Available: 11
• Height: 2.31 mm
• Length: 17.9 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Width: 7.5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FSR INSTRUCTION SUPPORT
Indirect addressing on the enhanced PIC12/16 con-
sists of two 16-bit File Select Registers (FSRs) and 2
Indirect File Registers (INDFs). In addition to the extra
FSR/INDF there are three new instructions designed to
improve the efficiency of indirect operations. The three
new instructions are:
1.
2.
3.
EXAMPLE 2:
The pre/post, increment/decrement are very simple
enhancements. The relative offset is slightly more com-
plex. In the relative offset case, a constant between -32
and +31 is added to the FSR to produce an effective
address. The INDF accesses the effective address.
After the access is complete (either read or write) the
effective address is lost and the FSR remains
unchanged.
FIGURE 4:
DS41375A-page 8
MOVIW
MOVIW
MOVIW
MOVIW
MOVIW
ADDFSR – Add a literal between -32 and 31 to
the specified FSR.
MOVIW – Move a value from the specified INDF
register into W.
MOVWI – Move a value from W into the specified
INDF register.
MOVIW AND MOVWI
LINEAR MEMORY ACCESSING
++FSR0
FSR0++
--FSR0
FSR0--
4[FSR0]
; Preincrement FSR0 then INDF0 -> W
; INDF0 -> W then postincrement FSR0
; Predecrement FSR0 then INDF0 -> W
; INDF0 -> W then postdecrement FSR0
; FSR0+4 INDF0 -> W.
Common
Core SFRs
Device SFRs
GPRs
The MOVIW and MOVWI instructions are special
because they have the ability to perform pre/post
increment/decrement on the FSR. They can also
perform relative indirect addressing.
USING MOVIW/MOVWI
MOVIW and MOVWI have the following syntax:
LINEAR RAM ACCESS
To simplify the use of large memory blocks, the FSRs
also provide a method of remapping the data memory
into a contiguous block of RAM. The FSR can provide
an alternate mapping by taking advantage of the 64-
Kbyte address space to locate a different mapping of
the GPR into a different memory region.
The GPRs and SFRs are mapped into the first 2 Kbytes
of address space in the FSR. Following the GPR/SFR
mapping, there is a reserved area (read as ‘0’) and then
comes a new view of the GPR data space at address
0x2000, as shown in Figure 4.
FSR0 unchanged
© 2009 Microchip Technology Inc.