PIC16C710-04E/P Microchip Technology, PIC16C710-04E/P Datasheet - Page 52
![IC MCU OTP 512X14 A/D 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16C710-04E/P
Manufacturer Part Number
PIC16C710-04E/P
Description
IC MCU OTP 512X14 A/D 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C710-04E/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
896B (512 x 14)
Program Memory Type
OTP
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
36 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
1
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
- Current page: 52 of 177
- Download datasheet (2Mb)
PIC16C71X
8.3
The PIC16CXX differentiates between various kinds of
reset:
• Power-on Reset (POR)
• MCLR reset during normal operation
• MCLR reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR) (PIC16C710/711/715)
• Parity Error Reset (PIC16C715)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on the MCLR and
FIGURE 8-9:
DS30272A-page 52
Applicable Devices
MCLR/V
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
OSC1/
CLKIN
V
Pin
DD
2: Brown-out Reset is implemented on the PIC16C710/711/715.
3: Parity Error Reset is implemented on the PIC16C715.
Reset
PP
On-chip
RC OSC
Pin
OST/PWRT
Brown-out
Program
Memory
Parity
V
Module
Reset
(1)
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
detect
WDT
DD
rise
(3)
OST
PWRT
(2)
SLEEP
10-bit Ripple-counter
10-bit Ripple-counter
710 71 711 715
WDT Time-out
Power-on Reset
MPEEN
BODEN
External
Reset
Enable PWRT
Enable OST
WDT Reset, on MCLR reset during SLEEP, and Brown-
out Reset (BOR). They are not affected by a WDT
Wake-up, which is viewed as the resumption of normal
operation. The TO and PD bits are set or cleared differ-
ently in different reset situations as indicated in Table 8-
7, Table 8-8 and Table 8-9. These bits are used in soft-
ware to determine the nature of the reset. See Table 8-
10 and Table 8-11 for a full description of reset states
of all registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 8-9.
The PIC16C710/711/715 have a MCLR noise filter in
the MCLR reset path. The filter will detect and ignore
small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
See Table 8-6 for time-out situations.
1997 Microchip Technology Inc.
S
R
Q
Chip_Reset
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