PIC16C770/SS Microchip Technology, PIC16C770/SS Datasheet - Page 11
![IC MCU OTP 2KX14 A/D PWM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16C770/SS
Manufacturer Part Number
PIC16C770/SS
Description
IC MCU OTP 2KX14 A/D PWM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C770-ISO.pdf
(220 pages)
2.PIC16C770-ISO.pdf
(6 pages)
3.PIC16C770-ISO.pdf
(8 pages)
Specifications of PIC16C770/SS
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
15
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOP309-1014 - ADAPTER 20-SSOP TO 20-DIP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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2.0
There are two memory blocks in each of these PICmi-
cro
and Data Memory) has its own bus, so that concurrent
access can occur.
Additional information on device memory may be found
in the PICmicro
Manual, (DS33023).
2.1
The PIC16C717/770/771 devices have a 13-bit pro-
gram counter capable of addressing an 8K x 14 pro-
gram memory space. The PIC16C717 and the
PIC16C770 have 2K x 14 words of program memory.
The PIC16C771 has 4K x 14 words of program mem-
ory. Accessing a location above the physically imple-
mented address will cause a wrap-around.
The RESET vector is at 0000h and the interrupt vector
is at 0004h.
FIGURE 2-1:
Program
Memory
On-chip
2002 Microchip Technology Inc.
®
microcontrollers. Each block (Program Memory
CALL, RETURN
RETFIE, RETLW
MEMORY ORGANIZATION
Program Memory Organization
PROGRAM MEMORY MAP
AND STACK OF THE
PIC16C717 AND PIC16C770
Mid-Range MCU Family Reference
Interrupt Vector
RESET Vector
Stack Level 8
Stack Level 2
Stack Level 1
PC<12:0>
Page 0
13
0000h
0004h
0005h
07FFh
3FFFh
FIGURE 2-2:
2.2
The data memory is partitioned into multiple banks,
which contain the General Purpose Registers and the
Special Function Registers. Bits RP1 and RP0 are the
bank select bits.
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers, implemented as
static RAM. All implemented banks contain special
function registers. Some frequently used special func-
tion registers from one bank are mirrored in another
bank for code reduction and quicker access.
2.2.1
The register file can be accessed either directly, or indi-
rectly, through the File Select Register FSR.
= 00
= 01
= 10
= 11
Program
On-chip
Memory
RP1
PIC16C717/770/771
CALL, RETURN
RETFIE, RETLW
Data Memory Organization
RP0
Bank3
Bank0
Bank1
Bank2
GENERAL PURPOSE REGISTER FILE
PROGRAM MEMORY MAP
AND STACK OF THE
PIC16C771
(STATUS<6:5>)
Interrupt Vector
RESET Vector
Stack Level 8
Stack Level 2
Stack Level 1
PC<12:0>
Page 0
Page 1
13
DS41120B-page 9
0000h
0004h
0005h
07FFh
0800h
0FFFh
1000h
3FFFh
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