PIC16LF818T-I/ML Microchip Technology, PIC16LF818T-I/ML Datasheet - Page 95

• Manufacturer Part Number: PIC16LF818T-I/ML
• Description: IC MCU FLASH 1KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF818T-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.9
The Power Control/Status register, PCON, has two bits
to indicate the type of Reset that last occurred.
Bit 0 is Brown-out Reset Status bit, BOR. Bit BOR is
unknown on a Power-on Reset. It must then be set by
the user and checked on subsequent Resets to see if
TABLE 12-1:
TABLE 12-2:
TABLE 12-3:
 2004 Microchip Technology Inc.
XT, HS, LP
EXTRC, EXTCLK, INTRC
Note 1:
Legend: u = unchanged, x = unknown
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset
WDT wake-up
Brown-out Reset
Interrupt wake-up from Sleep
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’
Note 1:
POR
0
0
0
1
1
1
1
1
Configuration
Oscillator
Power Control/Status Register
(PCON)
CPU start-up is always invoked on POR, BOR and wake-up from Sleep.
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
BOR
x
x
x
0
1
1
1
1
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS AND THEIR SIGNIFICANCE
RESET CONDITION FOR SPECIAL REGISTERS
Condition
T
TO
1
0
x
1
0
0
u
1
PWRT
PWRTE = 0
+ 1024 • T
T
PWRT
PD
Power-up
1
x
0
1
1
0
u
0
OSC
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep or interrupt wake-up from Sleep
PWRTE = 1
1024 • T
5-10 s
Program
PC + 1
Counter
PC + 1
000h
000h
000h
000h
000h
OSC
(1)
bit BOR cleared, indicating a Brown-out Reset
occurred. When the Brown-out Reset is disabled, the
state of the BOR bit is unpredictable.
Bit 1 is Power-on Reset Status bit, POR. It is cleared on
a Power-on Reset and unaffected otherwise. The user
must set this bit following a Power-on Reset.
(1)
T
PWRT
PWRTE = 0
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
+ 1024 • T
T
Register
PWRT
Brown-out Reset
Status
PIC16F818/819
OSC
PWRTE = 1
1024 • T
5-10 s
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
OSC
(1)
Register
DS39598E-page 93
PCON
1024 • T
from Sleep
5-10 s
Wake-up
OSC
(1)