PIC12C671-10I/SM Microchip Technology, PIC12C671-10I/SM Datasheet - Page 35

• Manufacturer Part Number: PIC12C671-10I/SM
• Description: IC MCU OTP 1KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C671-10I/SM

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 1
• Digital: RoHS Compliant
• Package: 8SOIJ
• Device Core: PIC
• Family Name: PIC12
• Maximum Speed: 10 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 5
• On-chip Adc: 4-chx8-bit
• Number Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164312 - MODULE SKT FOR PM3 16SOIC309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIP
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 6-3:
FIGURE 6-4:
6.2
After generating a START condition, the processor
transmits a control byte consisting of a EEPROM
address and a Read/Write bit that indicates what type
of operation is to be performed. The EEPROM address
consists of a 4-bit device code (1010) followed by three
don’t care bits.
The last bit of the control byte determines the operation
to be performed. When set to a one, a read operation
is selected, and when set to a zero, a write operation is
selected (Figure 6-5). The bus is monitored for its cor-
responding EEPROM address all the time. It generates
an acknowledge bit if the EEPROM address was true
and it is not in a programming mode.
SCL
SDA
1999 Microchip Technology Inc.
SCL
SDA
(A)
Device Addressing
CONDITION
START
(B)
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
ACKNOWLEDGE TIMING
1
2
3
Data from transmitter
4
ACKNOWLEDGE
ADDRESS OR
VALID
5
(C)
6
TO CHANGE
ALLOWED
7
DATA
Acknowledge
FIGURE 6-5:
8
Start Condition
Bit
S
9
1
Device Select
(D)
1
Receiver must release the SDA line at this
point so the Transmitter can continue
sending data.
0
Data from transmitter
Bits
EEPROM Address
CONTROL BYTE FORMAT
1
2
0
PIC12C67X
Acknowledge Condition
3
Read/Write Bit
X
Don’t Care
Bits
X
DS30561B-page 35
X
CONDITION
R/W
STOP
(C)
ACK
(A)