ATMEGA8U2-MU Atmel, ATMEGA8U2-MU Datasheet - Page 216
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ATMEGA8U2-MU
Manufacturer Part Number
ATMEGA8U2-MU
Description
MCU AVR 8K FLASH USB 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8U2-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
Package
32QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
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21.18.12 UECFG1X – USB Endpoint Configuration 1 Register
7799D–AVR–11/10
• Bit 7 – Res: Reserved
This bit is reserved and will always read as zero.
• Bit 6:4 – EPSIZE[2:0]: Endpoint Size Bits
These bits configure the endpoint size for the selected endpoint as shown in
Table 21-3.
• Bits 3:2 – EPBK[1:0]: Endpoint Bank Bits
These bits configure the number of banks that is allocated to the selected endpoint as shown in
Table
Table 21-4.
• Bit 1 – ALLOC: Endpoint Allocation Bit
Writing this to one allows to allocate the specified amount of memory (endpoint size x number of
banks) for the selected endpoint. Writing this bit to zero allows to free the previously allocated
memory for the selected endpoint.
See Section 21.6, page 198 for more details.
• Bit 0 – Res: Reserved
This bit is reserved and will always read as zero.
Bit
(0xED)
Read/Write
Initial Value
EPSIZE2
21-3.
EPBK1
0
0
0
0
1
1
1
1
0
0
1
1
R
7
0
EPSIZE[2:0] Bits Settings
-
EPBK[1:0] Bits Settings
R/W
6
0
EPSIZE1
0
0
1
1
0
0
1
1
EPSIZE[2:0]
R/W
5
0
EPBK0
0
1
0
1
R/W
4
0
EPSIZE0
0
1
0
1
0
1
0
1
R/W
Endpoint Size
One Bank
Two Banks
Reserved
ATmega8U2/16U2/32U2
3
0
EPBK1:0
Endpoint Size
8 Bytes
16 Bytes
32 Bytes
64 Bytes
Reserved.
R/W
2
0
ALLOC
R/W
1
0
Table
R
0
0
-
21-3.
UECFG1X
216
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