AT90PWM81-16MN Atmel, AT90PWM81-16MN Datasheet - Page 145

• Manufacturer Part Number: AT90PWM81-16MN
• Description: IC MCU AVR 8K FLASH ISP 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16MN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-MLF®, QFN
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.26.4
7734P–AVR–08/10
PSC Output Behavior During Reset
Table 12-22.
• Bit 0 – PEOPn: End Of PSC n Interrupt
This bit is set by hardware when PSC n achieves its whole cycle.
Must be cleared by software by writing a one to its location.
For external component safety reason, the state of PSC outputs during Reset can be programmed by fuses
PSCRV, PSCRRB & PSC2RB.
These fuses are located in the Extended Fuse Byte :
Table 12-23.
Notes:
PSCRV gives the state low or high which will be forced on PSC outputs selected by PSC0RB & PSC2RB
fuses.
If PSCRV fuse equals 0 (programmed), the selected PSC outputs will be forced to low state. If PSCRV
fuse equals 1 (unprogrammed), the selected PSC outputs will be forced to high state.
If PSCRRB fuse equals 1 (unprogrammed), PSCOUTR0 & PSCOUTR1 keep a standard port behavior. If
PSC0RB fuse equals 0 (programmed), PSCOUTR0 & PSCOUTR1 are forced at reset to low level or high
level according to PSCRV fuse bit. In this second case, PSCOUTR0 & PSCOUTR1 keep the forced state
until PSOC0 register is written.
If PSC2RB fuse equals 1 (unprogrammed), PSCOUT20 & PSCOUT21 keep a standard port behavior. If
PSC2RB fuse equals 0 (programmed), PSCOUT20 & PSCOUT21 are forced at reset to low level or high
PRNn1
0
0
1
1
Extended Fuse Byte
PSC2RB
PSC2RBA
PSCRRB
PSCRV
PSCINRB
BODLEVEL2
BODLEVEL1
BODLEVEL0
1. See
PRNn0
0
1
0
1
(1)
(1)
(1)
PSC n Ramp Number Description
Extended Low Fuse Byte
Table 7-2 on page 52
Description
The last event which has generated an interrupt occurred during ramp 1
The last event which has generated an interrupt occurred during ramp 2
The last event which has generated an interrupt occurred during ramp 3
The last event which has generated an interrupt occurred during ramp 4
Bit No
7
6
5
4
3
2
1
0
for BODLEVEL Fuse decoding
Description
PSC2 Reset Behavior
PSC2 Reset Behavior for
OUT22 & 23
PSC Reduced Reset Behavior
PSCOUT & PSCOUTR Reset
Value
PSC & PSCR Inputs Reset
Behavior
Brown-out Detector trigger level
Brown-out Detector trigger level
Brown-out Detector trigger level
Default Value
1
1
1
1
1
1 (unprogrammed)
0 (programmed)
1 (unprogrammed)
AT90PWM81
145