PIC12CE519-04/SN Microchip Technology, PIC12CE519-04/SN Datasheet - Page 53
PIC12CE519-04/SN
Manufacturer Part Number
PIC12CE519-04/SN
Description
IC MCU OTP 1KX12 W/EE 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE519-04/SN
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1046 - ADAPTER 8-SOIC TO 8-DIP309-1045 - ADAPTER 8-SOIC TO 8-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE519-04/SN
Manufacturer:
Microchip
Quantity:
360
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 53 of 688
- Download datasheet (3Mb)
Figure 3-1: Simplified Block Diagram of a Super-set On-chip Reset Circuit
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin or the INTRC oscillator.
1997 Microchip Technology Inc.
OSC1/
CLKIN
MCLR / V
MCLRE
Enable
V
I/O Pull-up
Pin
DD
2: Features in dashed boxes not available on all devices, see device’s Data Sheet.
3: In some devices, this pin may be configured as a general purpose Input.
4: The early PICmicro devices have the configuration bit defined as PWRTE = 1 is enabled, while all other
On-chip
devices the configuration bit is defined as PWRTE = 0 is enabled.
PP
RC OSC
OST/PWRT
Pin
Brown-out
Program
Memory
V
Module
(3)
(1)
Parity
detect
WDT
DD
Reset
rise
OST
PWRT
V
DD
Weak Pull-up
10-bit Ripple-counter
10-bit Ripple-counter
WDT Time-out
Power-on Reset
MPEEN
BODEN
SLEEP
MCLRE
(2)
(2)
(2)
(2)
Enable PWRT
Enable OST
(4)
See
Section 3. Reset
Table 3-1
for time-out situations.
S
R
DS31003A-page 3-3
Q
Chip_Reset
3
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