ATMEGA48A-MMHR Atmel, ATMEGA48A-MMHR Datasheet - Page 21

IC MCU AVR 4K FLASH 28QFN

ATMEGA48A-MMHR

Manufacturer Part Number
ATMEGA48A-MMHR
Description
IC MCU AVR 4K FLASH 28QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA48A-MMHR

Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
23
Eeprom Size
256 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
512 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
I²C, SPI, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.5.1
7.6
7.6.1
7.6.2
7.6.3
8271C–AVR–08/10
Register Description
General Purpose I/O Registers
EEARH and EEARL – The EEPROM Address Register
EEDR – The EEPROM Data Register
EECR – The EEPROM Control Register
The ATmega48A/48PA/88A/88PA/168A/168PA/328/328P contains three General Purpose I/O
Registers. These registers can be used for storing any information, and they are particularly use-
ful for storing global variables and Status Flags. General Purpose I/O Registers within the
address range 0x00 - 0x1F are directly bit-accessible using the SBI, CBI, SBIS, and SBIC
instructions.
• Bits 15:9] – Reserved
These bits are reserved bits in the ATmega48A/48PA/88A/88PA/168A/168PA/328/328P and will
always read as zero.
• Bits 8:0 – EEAR[8:0]: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
256/512/512/1K bytes EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 255/511/511/1023. The initial value of EEAR is undefined. A proper value must
be written before the EEPROM may be accessed.
EEAR8 is an unused bit in ATmega 48A/48PA and must always be written to zero.
• Bits 7:0 – EEDR[7:0]: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7:6 – Reserved
These bits are reserved bits in the ATmega48A/48PA/88A/88PA/168A/168PA/328/328P and will
always read as zero.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Bit
0x22 (0x42)
0x21 (0x41)
Read/Write
Initial Value
Bit
0x20 (0x40)
Read/Write
Initial Value
Bit
0x1F (0x3F)
Read/Write
Initial Value
EEAR7
MSB
R/W
R/W
15
R
R
7
0
X
7
0
7
0
EEAR6
R/W
R/W
14
R
R
6
0
X
6
0
6
0
EEPM1
EEAR5
R/W
R/W
R/W
13
R
5
X
5
0
X
5
0
EEPM0
EEAR4
R/W
R/W
R/W
12
X
R
4
4
0
X
4
0
EEAR3
EERIE
R/W
R/W
R/W
11
R
3
0
3
0
X
3
0
EEMPE
EEAR2
R/W
R/W
R/W
10
R
2
0
X
2
0
2
0
EEAR1
EEPE
R/W
R/W
R/W
R
9
1
0
X
1
0
X
1
EEAR8
EEAR0
EERE
R/W
R/W
LSB
R/W
R/W
X
X
8
0
0
0
0
0
EEARH
EEARL
EEDR
EECR
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