PIC16F627A-E/SO Microchip Technology, PIC16F627A-E/SO Datasheet - Page 71
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PIC16F627A-E/SO
Manufacturer Part Number
PIC16F627A-E/SO
Description
IC MCU FLASH 1KX14 EEPROM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F627A-IP.pdf
(180 pages)
3.PIC16F627A-IP.pdf
(8 pages)
4.PIC16F627A-IP.pdf
(22 pages)
5.PIC16F627A-ISO.pdf
(168 pages)
Specifications of PIC16F627A-E/SO
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
12.0
The Universal Synchronous Asynchronous Receiver
Transmitter (USART) is also known as a Serial
Communications Interface or SCI. The USART can be
configured as a full-duplex asynchronous system that
can communicate with peripheral devices such as CRT
terminals and personal computers, or it can be config-
ured as a half-duplex synchronous system that can
communicate with peripheral devices such as A/D or D/
A integrated circuits, Serial EEPROMs, etc.
REGISTER 12-1:
2004 Microchip Technology Inc.
UNIVERSAL SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (USART)
MODULE
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER (ADDRESS: 98h)
bit 7
CSRC: Clock Source Select bit
Asynchronous mode
Synchronous mode
TX9: 9-bit Transmit Enable bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
SYNC: USART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
Unimplemented: Read as ‘0’
BRGH: High Baud Rate Select bit
Asynchronous mode
Synchronous mode
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
TX9D: 9th bit of transmit data. Can be parity bit.
Legend:
R = Readable bit
-n = Value at POR
Note:
R/W-0
CSRC
1 = High speed
0 = Low speed
Unused in this mode
Don’t care
1 = Master mode (Clock generated internally from BRG)
0 = Slave mode (Clock from external source)
SREN/CREN overrides TXEN in SYNC mode.
R/W-0
TX9
R/W-0
TXEN
(1)
Preliminary
W = Writable bit
‘1’ = Bit is set
PIC16F627A/628A/648A
R/W-0
SYNC
The USART can be configured in the following modes:
• Asynchronous (full-duplex)
• Synchronous - Master (half-duplex)
• Synchronous - Slave (half-duplex)
Bit SPEN (RCSTA<7>), and bits TRISB<2:1>, have to
be set in order to configure pins RB2/TX/CK and RB1/
RX/DT as the Universal Synchronous Asynchronous
Receiver Transmitter.
Register 12-1 shows the Transmit Status and Control
Register (TXSTA) and Register 12-2 shows the
Receive Status and Control Register (RCSTA).
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
R/W-0
BRGH
x = Bit is unknown
TRMT
R-1
DS40044B-page 69
R/W-0
TX9D
bit 0