PIC16LF723A-I/SS Microchip Technology, PIC16LF723A-I/SS Datasheet - Page 189
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PIC16LF723A-I/SS
Manufacturer Part Number
PIC16LF723A-I/SS
Description
MCU PIC 3.5K FLASH XLP 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF723A-I/SS
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16LF
No. Of I/o's
25
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF723A-I/SS
Manufacturer:
MICROCHI
Quantity:
20 000
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18.0
The Flash program memory is readable during normal
operation over the full V
data from Program Memory, five Special Function
Registers (SFRs) are used:
• PMCON1
• PMDATL
• PMDATH
• PMADRL
• PMADRH
EXAMPLE 18-1:
© 2008 Microchip Technology Inc.
PROGRAM MEMORY READ
BANKSEL PMADRL
MOVF
MOVWF
MOVF
MOVWF
BANKSEL PMCON1
BSF
NOP
NOP
BANKSEL PMDATL
MOVF
MOVWF
MOVF
MOVWF
PROGRAM MEMORY READ
MS_PROG_ADDR, W ;
PMADRH
LS_PROG_ADDR, W ;
PMADRL
PMCON1, RD
PMDATL, W
LOWPMBYTE
PMDATH, W
HIGHPMBYTE
DD
range of the device. To read
;
;MS Byte of Program Address to read
;LS Byte of Program Address to read
;
;Initiate Read
;Any instructions here are ignored as program
;memory is read in second cycle after BSF
;
;W = LS Byte of Program Memory Read
;
;W = MS Byte of Program Memory Read
;
Preliminary
PIC16F72X/PIC16LF72X
The value written to the PMADRH:PMADRL register
pair determines which program memory location is
read. The read operation will be initiated by setting the
RD bit of the PMCON1 register. The program memory
flash controller takes two instructions to complete the
read, causing the second instruction after the setting
the RD bit will be ignored. To avoid conflict with pro-
gram execution, it is recommended that the two instruc-
tions following the setting of the RD bit are NOP. When
the read completes, the result is placed in the
PMDATLH:PMDATL
Example 18-1 for sample code.
Note:
Code-protect does not effect the CPU
from performing a read operation on the
program memory. For more information,
refer to Section 8.2 “Code Protection”
register
pair.
DS41341B-page 187
Refer
to
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