ATTINY2313V-10SUR Atmel, ATTINY2313V-10SUR Datasheet - Page 104
ATTINY2313V-10SUR
Manufacturer Part Number
ATTINY2313V-10SUR
Description
MCU AVR 2KB FLASH 10MHZ 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY2313-20MU.pdf
(226 pages)
Specifications of ATTINY2313V-10SUR
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Cpu Family
ATtiny
Device Core
AVR
Device Core Size
8b
Frequency (max)
10MHz
Interface Type
SPI/USART/USI
Total Internal Ram Size
128Byte
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
SOIC W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Compliant
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16-bit
Timer/Counter
Register
Description
Timer/Counter1
Control Register A –
TCCR1A
104
ATtiny2313
• Bit 7:6 – COM1A1:0: Compare Output Mode for Channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for Channel B
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-
dent of the WGM13:0 bits setting.
WGM13:0 bits are set to a Normal or a CTC mode (non-PWM).
Table 43. Compare Output Mode, non-PWM
Table 44
mode.
Table 44. Compare Output Mode, Fast PWM
Bit
Read/Write
Initial Value
COM1A1/COM1B1
COM1A1/COM1B1
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the fast PWM
0
0
1
1
0
0
1
1
COM1A1
R/W
7
0
COM1A0
COM1A0/COM1B0
COM1A0/COM1B0
R/W
6
0
0
1
0
1
0
1
0
1
COM1B1
R/W
5
0
Table 43
COM1B0
R/W
4
0
Description
Normal port operation, OC1A/OC1B
disconnected.
Toggle OC1A/OC1B on Compare Match.
Clear OC1A/OC1B on Compare Match (Set
output to low level).
Set OC1A/OC1B on Compare Match (Set output
to high level).
Description
Normal port operation, OC1A/OC1B
disconnected.
WGM13=0: Normal port operation, OC1A/OC1B
disconnected.
WGM13=1: Toggle OC1A on Compare Match,
OC1B reserved.
Clear OC1A/OC1B on Compare Match, set
OC1A/OC1B at TOP
Set OC1A/OC1B on Compare Match, clear
OC1A/OC1B at TOP
(1)
shows the COM1x1:0 bit functionality when the
R
3
–
0
R
2
–
0
WGM11
R/W
1
0
WGM10
R/W
0
0
TCCR1A
2543L–AVR–08/10
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