PIC16F1826-E/P Microchip Technology, PIC16F1826-E/P Datasheet - Page 278

MCU PIC 8BIT 2K FLASH 18-DIP

PIC16F1826-E/P

Manufacturer Part Number
PIC16F1826-E/P
Description
MCU PIC 8BIT 2K FLASH 18-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1826-E/P

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Core
PIC
Processor Series
PIC16F
Data Bus Width
8 bit
Maximum Clock Frequency
32 MHz
Data Ram Size
256 B
On-chip Adc
Yes
Number Of Programmable I/os
15
Number Of Timers
3
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
12
Height
3.3 mm
Interface Type
I2C, SPI, UART
Length
22.86 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.3 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F/LF1826/27
24.6.13.3
Bus collision occurs during a Stop condition if:
a)
b)
FIGURE 24-38:
FIGURE 24-39:
DS41391C-page 278
After the SDAx pin has been deasserted and
allowed to float high, SDAx is sampled low after
the BRG has timed out.
After the SCLx pin is deasserted, SCLx is
sampled low before SDAx goes high.
SDAx
SCLx
PEN
BCLxIF
P
SSPxIF
SDAx
SCLx
PEN
BCLxIF
P
SSPxIF
Bus Collision During a Stop
Condition
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDAx asserted low
Assert SDAx
T
BRG
T
BRG
Preliminary
T
BRG
T
BRG
The Stop condition begins with SDAx asserted low.
When SDAx is sampled low, the SCLx pin is allowed to
float. When the pin is sampled high (clock arbitration),
the Baud Rate Generator is loaded with SSPxADD and
counts down to 0. After the BRG times out, SDAx is
sampled. If SDAx is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ‘0’ (Figure 24-37). If the SCLx pin is
sampled low before SDAx is allowed to float high, a bus
collision occurs. This is another case of another master
attempting to drive a data ‘0’ (Figure 24-38).
SCLx goes low before SDAx goes high,
set BCLxIF
T
BRG
T
BRG
 2010 Microchip Technology Inc.
SDAx sampled
low after T
set BCLxIF
’0’
’0’
’0’
’0’
BRG
,

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