PIC12F510-E/P Microchip Technology, PIC12F510-E/P Datasheet - Page 75
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PIC12F510-E/P
Manufacturer Part Number
PIC12F510-E/P
Description
IC PIC MCU FLASH 1KX14 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F510-ISN.pdf
(124 pages)
2.PIC12F510-ISN.pdf
(8 pages)
3.PIC12F510-ISN.pdf
(20 pages)
Specifications of PIC12F510-E/P
Core Size
8-Bit
Program Memory Size
1.5KB (1K x 12)
Core Processor
PIC
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
38 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
38Byte
Cpu Speed
8MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
38 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
5
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164101, DV164120, DM163029
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 3 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162070 - HEADER INTRFC MPLAB ICD2 8/14PDM163029 - BOARD PICDEM FOR MECHATRONICS
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F510-E/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
ADDWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
ANDLW
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
© 2007 Microchip Technology Inc.
Add W and f
[ label ] ADDWF
0 ≤ f ≤ 31
d ∈ [0,1]
(W) + (f) → (dest)
Add the contents of the W register
and register ‘f’. If ‘d’ is ‘0’, the result
is stored in the W register. If ‘d’ is
‘1’, the result is stored back in
register ‘f’.
AND W with f
[ label ] ANDWF
0 ≤ f ≤ 31
d ∈ [0,1]
(W) .AND. (f) → (dest)
The contents of the W register are
AND’ed with register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W register.
If ‘d’ is ‘1’, the result is stored back
in register ‘f’.
AND literal with W
[ label ] ANDLW
0 ≤ k ≤ 255
(W).AND. (k) → (W)
The contents of the W register are
AND’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
f,d
f,d
k
BCF
Syntax:
Operands:
Operation:
Status Affected: None
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected: None
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected: None
Description:
PIC12F510/16F506
Bit Clear f
[ label ] BCF
0 ≤ f ≤ 31
0 ≤ b ≤ 7
0 → (f<b>)
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0 ≤ f ≤ 31
0 ≤ b ≤ 7
1 → (f<b>)
Bit ‘b’ in register ‘f’ is set.
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0 ≤ f ≤ 31
0 ≤ b ≤ 7
skip if (f<b>) = 0
If bit ‘b’ in register ‘f’ is ‘0’, then the
next instruction is skipped.
If bit ‘b’ is ‘0’, then the next instruc-
tion fetched during the current
instruction execution is discarded,
and a NOP is executed instead,
making this a two-cycle instruction.
f,b
f,b
DS41268D-page 73