PIC12F615-E/SN Microchip Technology, PIC12F615-E/SN Datasheet - Page 13

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PIC12F615-E/SN

Manufacturer Part Number
PIC12F615-E/SN
Description
IC PIC MCU FLASH 1KX14 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F615-E/SN

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS-232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC162083 - HEADER MPLAB ICD2 PIC16F616 8/14
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Price
Part Number:
PIC12F615-E/SN
0
TABLE 2-1:
© 2006 Microchip Technology Inc.
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Addr
1:
INDF
TMR0
PCL
STATUS
FSR
GPIO
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
VRCON
CMCON0
CMCON1
Name
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
IRP and RP1 bits are reserved, always maintain these bits clear.
PIC12F609/HV609 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
CMVREN
T1GINV
CMON
IRP
Bit 7
GIE
(1)
TMR1GE
RP1
COUT
PEIE
Bit 6
(1)
T1CKPS1
CMOE
Bit 5
RP0
GP5
T0IE
VRR
PIC12F609/615/12HV609/615
T1CKPS0
CMPOL
FVREN
T1ACS
INTE
Preliminary
Bit 4
GP4
TO
Write Buffer for upper 5 bits of Program Counter
T1OSCEN
CMHYS
GPIE
CMIF
Bit 3
GP3
VR3
PD
T1SYNC
CMR
Bit 2
T0IF
GP2
VR2
Z
TMR1CS
T1GSS
Bit 1
INTF
GP1
VR1
DC
CMSYNC
TMR1ON
TMR1IF
CMCH
GPIF
Bit 0
GP0
VR0
C
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--x0 x000
---0 0000
0000 0000
---- 0--0
xxxx xxxx
xxxx xxxx
0000 0000
0-00 0000
0000 -0-0
---0 0-10
POR, BOR
Value on
DS41302A-page 11
22, 100
41, 100
22, 100
15, 100
22, 100
31, 100
22, 100
17, 100
19, 100
45, 100
45, 100
49, 100
62, 101
58, 101
59, 101
Page

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