M3087BFKGP#U3 Renesas Electronics America, M3087BFKGP#U3 Datasheet - Page 217
![IC M32C/87B MCU FLASH 144LQFP](/photos/12/31/123119/m3087bfkgp_u3_sml.jpg)
M3087BFKGP#U3
Manufacturer Part Number
M3087BFKGP#U3
Description
IC M32C/87B MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M3087BFKGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 193 of 587
15.2.3
Table 15.11
NOTES:
Count source
Count operation
Count start condition
Count stop condition
Interrupt request generation timing • When the valid edge of a pulse is input
TBiIN pin function
Read from timer
Write to timer
1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).
2. An interrupt request is not generated when the first valid edge is input after the count starts.
3. To set the MR3 bit to 0 (no overflow), wait for one or more count source cycles to write to the TBiMR register
4. A value read from the TBi register is undefined until the second valid edge is detected after the count starts.
In pulse period measurement mode and pulse width measurement mode, the timer measures pulse period or
pulse width of the external signal.
Table 15.11 shows specifications in pulse period measurement mode and pulse width measurement mode.
Figure 15.29 shows a pulse period measurement operation. Figure 15.30 shows a pulse width measurement
operation.
after the MR3 bit becomes 1, while the TBiS bit is set to 1.
Pulse Period Measurement Mode, Pulse Width Measurement Mode
Item
Specifications of Pulse Period Measurement Mode, Pulse Width Measurement Mode
f1, f8, f2n
• Counter increments
The TBiS bit (i = 0 to 5) in the TABSR or TBSR register is set to 1 (count starts)
The TBiS bit is set to 0 (count stops)
• When the timer overflows
Pulse input
A read from the TBi register returns the contents of the reload register
(measurement results)
The TBi register cannot be written
The counter value is transferred to the reload register when the valid edge of a
The MR3 bit in the TBiMR register is set to 1 (overflow) simultaneously.
pulse is detected. Then the counter becomes 0000h and the
count continues.
(1)
, fC32
(4)
(3)
Specification
(2)
15. Timer B
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