M30845FWGP#U3 Renesas Electronics America, M30845FWGP#U3 Datasheet - Page 60
![IC M32C MCU FLASH 320K 144LQFP](/photos/12/31/123109/m30845fwgp_u3_sml.jpg)
M30845FWGP#U3
Manufacturer Part Number
M30845FWGP#U3
Description
IC M32C MCU FLASH 320K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Specifications of M30845FWGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
320KB (320K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
R
M
e
. v
3
Figure 5.4 V
2
1
C
2 .
8 /
1
4
Memory Expansion Mode and Microprocessor Mode
(when accessing an external memory space with the multiplexed bus)
J
G
u
. l
o r
[ Read Timing ] (2 +2 Bus Cycle)
CSi
ADi
RD
[ Write Timing ] (2 +2 Bus Cycle)
CSi
ADi
WR,WRL,
WRH
BCLK
ALE
ADi
/DBi
BHE
BCLK
ALE
ADi
/DBi
BHE
NOTES:
NOTES:
0
u
, 8
1. Varies with operation frequency:
p
2. Varies with operation frequency:
2
CC1
(
t
t
t
t
t
d(AD-ALE)
h(ALE-AD)
h(RD-AD)
ac2(RD-DB)
ac2(AD-DB)
M
0
t
(if external bus cycle is a + b , n=a)
t
(if external bus cycle is a + b , n=a)
t
t
t
(if external bus cycle is a + b , m=(b x 2)-1)
d(AD-ALE)
h(ALE-AD)
h(WR-AD)
h(WR-CS)
d(DB-WR)
0
3
5
=V
2
18ns.max
t
C
d(BCLK-ALE)
t
18ns.max
CC2
d(BCLK-ALE)
=(tcyc/2-10)ns.min, t
Page 58
8 /
=(tcyc/2 x n-20)ns.min (if external bus cycle is a + b , n=a)
=(tcyc/2 x n-10)ns.min (if external bus cycle is a + b , n=a)
=(tcyc/2-10)ns.min,
=(tcyc/2-10)ns.min, t
=(tcyc/2 x m-25)ns.min
=(tcyc/2 x p-35)ns.max (if external bus cycle is a + b , p={(a+b-1) x 2}+1)
=(tcyc/2 x n - 20)ns.min
=(tcyc/2 x n -10)ns.min
=(tcyc/2 x m-35)ns.max (if external bus cycle is a + b , m=(b x 2)-1)
t
d(BCLK-CS)
, 4
18ns.max
t
t
t
18ns.max
18ns.max
d(BCLK-AD)
18ns.max
d(BCLK-CS)
d(BCLK-AD)
=5V Timing Diagram (2)
t
t
d(AD-ALE)
M
d(AD-ALE)
t
ac2(AD-DB)
3
2
C
f o
8 /
8
(1)
(2)
4
5
) T
(1)
h(RD-CS)
Address
Address
h(WR-DB)
t
h(BCLK-ALE)
t
h(BCLK-ALE)
-2ns.min
-2ns.min
=(tcyc/2-10)ns.min
t
h(ALE-AD)
=(tcyc/2-10)ns.min
t
h(ALE-AD)
(2)
(1)
t
t
d(BCLK-WR)
d(BCLK-RD)
18ns.max
t
dz(RD-AD)
18ns.max
8ns.max
t
ac2(RD-DB)
tcyc
tcyc
t
d(DB-WR)
tcyc=
Measurement Conditions:
• V
• Input high and low voltage:
• Output high and low voltage:
(1)
t
t
su(DB-BCLK)
h(BCLK-WR)
f
CC1
t
(BCLK)
Data output
5. Electrical Characteristics (M32C/84)
h(BCLK-RD)
-5ns.min
(2)
-5ns.min
10
V
V
=V
IH
OH
9
=2.5V, V
Data input
CC2
=2.0V, V
t
h(WR-CS)
=4.2 to 5.5V
26ns.min
t
0ns.min
h(RD-DB)
Vcc
t
IL
h(RD-CS)
t
OL
=0.8V
t
h(WR-DB)
t
h(WR-AD)
h(RD-AD)
(2)
=0.8V
1
=Vcc
(1)
(2)
t
h(BCLK-AD)
(1)
(2)
2
t
-3ns.min
t
=5V
t
h(BCLK-CS)
-3ns.min
Address
-3ns.min
-3ns.min
h(BCLK-CS)
h(BCLK-AD)
Address