MCF5211CAE66 Freescale Semiconductor, MCF5211CAE66 Datasheet - Page 20
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MCF5211CAE66
Manufacturer Part Number
MCF5211CAE66
Description
IC MCU 128K FLASH 66MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet
1.MCF5213CAF80.pdf
(54 pages)
Specifications of MCF5211CAE66
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
MCF521x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C/QSPI/UART
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
56
Number Of Timers
10
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Package
64LQFP
Device Core
ColdFire
Family Name
MCF521x
Maximum Speed
66 MHz
For Use With
M5211DEMO - KIT DEMO FOR MCF5211
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5211CAE66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Family Configurations
1.3
Table 5
1.4
Table 6
1.5
Table 7
20
Clock Mode Selection
Reset Configuration
describes signals used to reset the chip or as a reset indication.
describes signals used to support the on-chip clock generation circuitry.
describes signals used in mode selection;
External Clock In
Signal Name
Signal Name
Signal Name
Reset Out
Reset Signals
PLL and Clock Signals
Mode Selection
Clock Out
Reset In
Crystal
Test
CLKMOD[1:0]
00
00
01
10
10
11
Abbreviation
Abbreviation
CLKMOD[1:0] Selects the clock boot mode.
Abbreviation
CLKOUT
RSTO
EXTAL
RSTI
XTAL
RCON
XTAL
TEST
N/A
N/A
0
1
0
1
MCF5213 ColdFire Microcontroller, Rev. 4
Table 7. Mode Selection Signals
Primary reset input to the device. Asserting RSTI for at least 8 CPU
clock cycles immediately resets the CPU and peripherals.
Driven low for 1024 CPU clocks after the reset source has deasserted.
PLL disabled, clock driven by external oscillator
PLL disabled, clock driven by on-chip oscillator
PLL disabled, clock driven by crystal
PLL in normal mode, clock driven by external oscillator
PLL in normal mode, clock driven by on-chip oscillator
PLL in normal mode, clock driven by crystal
Table 6. PLL and Clock Signals
relaxation oscillator is used.
part of the clock mode selection mechanism.
This output signal reflects the internal system clock.
Crystal oscillator or external clock input except when the on-chip
Crystal oscillator output except when CLKMOD0=0, then sampled as
The Serial Flash Programming mode is entered by asserting the
RCON pin (with the TEST pin negated) as the chip comes out of
reset. During this mode, the EzPort has access to the flash memory
which can be programmed from an external device.
Reserved for factory testing only and in normal modes of operation
should be connected to VSS to prevent unintentional activation of
test functions.
Table 8. Clocking Modes
Table 8
Table 5. Reset Signals
describes the particular clocking modes.
Configure the clock mode.
Function
Function
Function
Freescale Semiconductor
I/O
I/O
I/O
O
O
O
I
I
I
I