MC908GR48ACFAE Freescale Semiconductor, MC908GR48ACFAE Datasheet - Page 145

• Manufacturer Part Number: MC908GR48ACFAE
• Description: IC MCU 48K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR48ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: ESCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 24-ch x 10-bit
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1.5KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.6.3 Port D Input Pullup Enable Register
The port D input pullup enable register (PTDPUE) contains a software configurable pullup device for each
of the eight port D pins. Each bit is individually configurable and requires that the data direction register,
DDRD, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRD is configured for output mode.
PTDPUE7–PTDPUE0 — Port D Input Pullup Enable Bits
12.7 Port E
Port E is a 6-bit special-function port that shares two of its pins with the enhanced serial communications
interface (ESCI) module.
12.7.1 Port E Data Register
The port E data register contains a data latch for each of the six port E pins.
PTE5–PTE0 — Port E Data Bits
Freescale Semiconductor
These writable bits are software programmable to enable pullup devices on an input port bit.
These read/write bits are software-programmable. Data direction of each port E pin is under the control
of the corresponding bit in data direction register E. Reset has no effect on port E data.
1 = Corresponding port D pin configured to have internal pullup
0 = Corresponding port D pin has internal pullup disconnected
Alternate Function:
Address:
Reset:
Read:
Write:
Data direction register E (DDRE) does not affect the data direction of port
E pins that are being used by the ESCI module. However, the DDRE bits
always determine whether reading port E returns the states of the latches
or the states of the pins. See
Address:
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Reset:
Read:
Write:
Figure 12-16. Port D Input Pullup Enable Register (PTDPUE)
PTDPUE7
$000F
Bit 7
0
$0008
Bit 7
0
PTDPUE6
Figure 12-17. Port E Data Register (PTE)
6
0
= Unimplemented
6
0
PTDPUE5
5
0
PTE5
Table
5
PTDPUE4
NOTE
12-6.
4
0
Unaffected by reset
PTE4
4
PTDPUE3
3
0
PTE3
3
PTDPUE2
2
0
PTE2
2
PTDPUE1
1
0
PTE1
RxD
1
PTDPUE0
Bit 0
0
PTE0
Bit 0
TxD
Port E
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