R5F21191SP#U0 Renesas Electronics America, R5F21191SP#U0 Datasheet - Page 17

IC R8C MCU FLASH 8K 20SSOP

R5F21191SP#U0

Manufacturer Part Number
R5F21191SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/19r
Datasheets

Specifications of R5F21191SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x1b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/18 Group, R8C/19 Group
Rev.1.40
REJ03B0124-0140
2.8.7
2.8.8
2.8.9
2.8.10
IPL is 3 bits wide, assigns processor interrupt priority levels from level 0 to level 7.
The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of
software interrupt numbers 0 to 31 is executed.
If a requested interrupt has higher priority than IPL, the interrupt is enabled.
ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
If necessary, set to 0. When read, the content is undefined.
The I flag enables maskable interrupts.
Interrupts are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is
set to 0 when an interrupt request is acknowledged.
Apr 14, 2006
Interrupt Enable Flag (I)
Stack Pointer Select Flag (U)
Processor Interrupt Priority Level (IPL)
Reserved Bit
Page 15 of 38
2. Central Processing Unit (CPU)

Related parts for R5F21191SP#U0