C8051F987-GU Silicon Laboratories Inc, C8051F987-GU Datasheet - Page 74
C8051F987-GU
Manufacturer Part Number
C8051F987-GU
Description
IC MCU 8BIT 8KB FLASH 24QSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F987-GU
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QSOP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
1 Analog Comparator
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1955-5
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Part Number
Manufacturer
Quantity
Price
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Part Number:
C8051F987-GU
Manufacturer:
Silicon
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C8051F99x-C8051F98x
SFR Definition 5.3. ADC0AC: ADC0 Accumulator Configuration
SFR Page = 0x0; SFR Address = 0xBA
74
Name AD012BE
Reset
Type
Bit
5:3
2:0
Bit
7
6
AD0SJST[2:0] ADC0 Accumulator Shift and Justify.
AD0RPT[2:0] ADC0 Repeat Count.
AD012BE
R/W
AD0AE
Name
7
0
AD0AE
ADC0 12-Bit Mode Enable.
Enables 12-bit Mode on C8051F980/6 and C8051F990/6 devices.
0: 12-bit Mode Disabled.
1: 12-bit Mode Enabled.
ADC0 Accumulate Enable.
Enables multiple conversions to be accumulated when burst mode is disabled.
0: ADC0H:ADC0L contain the result of the latest conversion when Burst Mode is
disabled.
1: ADC0H:ADC0L contain the accumulated conversion results when Burst Mode
is disabled. Software must write 0x0000 to ADC0H:ADC0L to clear the accumu-
lated result.
This bit is write-only. Always reads 0b.
Specifies the format of data read from ADC0H:ADC0L.
000: Right justified. No shifting applied.
001: Right justified. Shifted right by 1 bit.
010: Right justified. Shifted right by 2 bits.
011: Right justified. Shifted right by 3 bits.
100: Left justified. No shifting applied.
All remaining bit combinations are reserved.
Selects the number of conversions to perform and accumulate in Burst Mode.
This bit field must be set to 000 if Burst Mode is disabled.
000: Perform and Accumulate 1 conversion.
001: Perform and Accumulate 4 conversions.
010: Perform and Accumulate 8 conversions.
011: Perform and Accumulate 16 conversions.
100: Perform and Accumulate 32 conversions.
101: Perform and Accumulate 64 conversions.
All remaining bit combinations are reserved.
W
6
0
5
0
AD0SJST[2:0]
R/W
Rev. 1.0
4
0
Function
3
0
2
0
AD0RPT[2:0]
R/W
1
0
0
0
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