C8051T605-GM Silicon Laboratories Inc, C8051T605-GM Datasheet - Page 111
![IC 8051 MCU 2K-EEPROM 11-QFN](/photos/12/25/122555/c8051t605-gm_sml.jpg)
C8051T605-GM
Manufacturer Part Number
C8051T605-GM
Description
IC 8051 MCU 2K-EEPROM 11-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T60xr
Datasheet
1.C8051T600EDB.pdf
(188 pages)
Specifications of C8051T605-GM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
8
Program Memory Size
2KB (2K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
11-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SMBus, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T600DK
Minimum Operating Temperature
- 40 C
For Use With
336-1404 - KIT DEV FOR C8051T60X MCU'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1660-5
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22.3. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 22.3) assigns a priority to each I/O function, starting at the top with
UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that
resource (excluding UART0, which is always at pins P0.4 and P0.5). If a Port pin is assigned, the crossbar
skips that pin when assigning the next selected resource. Additionally, the crossbar will skip Port pins
whose associated bits in the XBR0 register are set. The XBR0 register allows software to skip Port pins
that are to be used for analog input, dedicated functions, or GPIO.
Important note on crossbar configuration: If a Port pin is claimed by a peripheral without use of the
crossbar, its corresponding XBR0 bit should be set. This applies to P0.0 if VREF is used, P0.3 if the exter-
nal oscillator circuit is enabled, P0.6 if the ADC is configured to use the external conversion start signal
(CNVSTR), and any selected ADC or comparator inputs. The crossbar skips selected pins as if they were
already assigned, and moves to the next unassigned pin. Figure 22.3 shows the potential pin assigments
available to the crossbar peripherals. Figure 22.4 and Figure 22.5 show two example crossbar configura-
tions, with and without skipping pins.
Pin Number
SYSCLK
Function
Pin Skip
Settings
Special
Signals
Figure 22.3. Priority Crossbar Decoder Potential Pin Assignments
CP0A
CEX0
CEX1
CEX2
SDA
RX0
SCL
CP0
Port
TX0
ECI
T0
T1
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 x
XBR0
P0
All Port 0 pins are capable of being assigned to
crossbar peripherals.
The crossbar peripherals are assigned in priority
order from top to bottom, according to this
diagram.
potentially be assigned to a peripheral.
the crossbar. When these signals are enabled,
the Crossbar should be manually configured to
skip the corresponding port pins.
setting the corresponding bit in XBR0 to ‘1’.
Rev. 1.2
These boxes represent Port 0 pins which can
Special Function Signals are not assigned by
Pins P0.0 through P0.6 can be “skipped” by
C8051T600/1/2/3/4/5/6
111
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