PIC18LF4331-I/ML Microchip Technology, PIC18LF4331-I/ML Datasheet - Page 48
![IC PIC MCU FLASH 4KX16 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4331-I/ML
Manufacturer Part Number
PIC18LF4331-I/ML
Description
IC PIC MCU FLASH 4KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(4 pages)
8.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18LF4331-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18LF2331-ISO PDF datasheet #8
- Current page: 48 of 392
- Download datasheet (4Mb)
register
PIC18F2331/2431/4331/4431
5.1
Device Reset events are tracked through the RCON
indicate that a specific Reset event has occurred. In most
cases, these bits can only be cleared by the event and
must be set by the application after the event. The state
of these flag bits, taken together, can be read to indicate
the type of Reset that just occurred. This is described in
more detail in
The RCON register also has control bits for setting
interrupt priority (IPEN) and software control of the
BOR (SBOREN). Interrupt priority is discussed in
Section 10.0
Section 5.4 “Brown-out Reset
REGISTER 5-1:
DS39616D-page 48
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
Note 1: It is recommended that the POR bit be set after a Power-on Reset has been detected so that subsequent
R/W-0
IPEN
2:
(Register
2: Brown-out Reset is said to have occurred when BOR is ‘0’ and POR is ‘1’ (assuming that POR was set to
RCON Register
If SBOREN is enabled, its Reset state is ‘1’; otherwise, it is ‘0’.
The actual Reset value of POR is determined by the type of device Reset. See the notes following this
register and
Power-on Resets may be detected.
‘1’ by software immediately after a Power-on Reset).
Section 5.6 “Reset State of
“Interrupts”. BOR is covered in
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed (set by firmware only)
0 = The RESET instruction was executed causing a device Reset (must be set in software after a
TO: Watchdog Time-out Flag bit
1 = Set by power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-Down Detection Flag bit
1 = Set by power-up or by the CLRWDT instruction
0 = Set by execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = A Power-on Reset has not occurred (set by firmware only)
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred (set by firmware only)
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
5-1). The lower five bits of the register
Brown-out Reset occurs)
U-0
—
RCON: RESET CONTROL REGISTER
Section 5.6 “Reset State of Registers”
W = Writable bit
‘1’ = Bit is set
(BOR)”.
U-0
—
Registers”.
R/W-1
(2)
(1)
RI
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TO
for additional information.
Note 1: If the BOREN Configuration bit is set
2: It is recommended that the POR bit be
(Brown-out Reset enabled), the BOR bit
is ‘1’ on a Power-on Reset. After a
Brown-out Reset has occurred, the BOR
bit will be cleared and must be set by
firmware to indicate the occurrence of the
next Brown-out Reset.
set after a Power-on Reset has been
detected, so that subsequent Power-on
Resets may be detected.
R-1
PD
2010 Microchip Technology Inc.
x = Bit is unknown
POR
R/W-0
(2)
BOR
R/W-0
(1)
bit 0
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