PIC18LF2455-I/SP Microchip Technology, PIC18LF2455-I/SP Datasheet - Page 10
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PIC18LF2455-I/SP
Manufacturer Part Number
PIC18LF2455-I/SP
Description
IC PIC MCU FLASH 12KX16 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XR1.pdf
(438 pages)
3.PIC18F2221-ISO.pdf
(46 pages)
4.PIC18F2455-ISO.pdf
(14 pages)
5.PIC18F2455-ISO.pdf
(8 pages)
6.PIC18F2455-ISO.pdf
(26 pages)
7.PIC18LF4550-IML.pdf
(430 pages)
Specifications of PIC18LF2455-I/SP
Core Size
8-Bit
Program Memory Size
24KB (12K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
2048Byte
Cpu Speed
48MHz
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2048 B
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
24
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC18F2455/2550/4455/4550
17. Module: MSSP
DS80478A-page 10
It has been observed that following a Power-on
Reset, the I
just configuring the SCL and SDA pins as either
inputs or outputs. This has only been seen in a few
unique system environments.
A test of a statistically significant sample of pre-
production systems, across the voltage and
current range of the application's power supply,
should indicate if a system is susceptible to this
issue.
Work around
Before configuring the module for I
1. Configure the SCL and SDA pins as outputs by
2. Force SCL and SDA low by clearing the
3. While keeping the LAT bits clear, configure
Once this is done, use the SSPCON1 and
SSPCON2 registers to configure the proper I
mode as before.
Affected Silicon Revisions
A3
clearing their corresponding TRIS bits.
corresponding LAT bits.
SCL and SDA as inputs by setting their TRIS
bits.
X
2
C mode may not initialize properly by
B4
B5
B6
2
C operation:
B7
2
C
18. Module: MSSP
EXAMPLE 5:
When the MSSP is configured for SPI mode, the
Buffer Full bit, BF (SSPSTAT<0>), should not be
polled in software to determine when the transfer
is complete.
Work around
Copy the SSPSTAT register into a variable and
perform the bit test on the variable. In Example 5,
SSPSTAT is copied into the working register
where the bit test is performed.
A second option is to poll the Master Synchronous
Serial Port Interrupt Flag bit, SSPIF (PIR1<3>).
This bit can be polled and will set when the transfer
is complete.
Affected Silicon Revisions
loop_MSB:
A3
X
MOVF
BTFSS
BRA
B4
SSPSTAT, W
WREG, BF
loop_MSB
SSPSTAT WORK AROUND
© 2009 Microchip Technology Inc.
B5
B6
B7