PIC16LF876A-I/ML Microchip Technology, PIC16LF876A-I/ML Datasheet - Page 96
![IC PIC MCU FLASH 8KX14 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LF876A-I/ML
Manufacturer Part Number
PIC16LF876A-I/ML
Description
IC PIC MCU FLASH 8KX14 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF876A-I/ML
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16LF
No. Of I/o's
22
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Package
28QFN EP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
22
Interface Type
I2C/SPI/USART
On-chip Adc
5-chx10-bit
Number Of Timers
3
Processor Series
PIC16LF
Core
PIC
Data Ram Size
368 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
Q1462187
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF876A-I/ML
Manufacturer:
Microchi
Quantity:
658
Part Number:
PIC16LF876A-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F87XA
9.4.5
The addressing procedure for the I
the first byte after the Start condition usually determines
which device will be the slave addressed by the master.
The exception is the general call address which can
address all devices. When this address is used, all
devices should, in theory, respond with an Acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all ‘0’s with R/W = 0.
The general call address is recognized when the Gen-
eral Call Enable bit (GCEN) is enabled (SSPCON2<7>
set). Following a Start bit detect, 8 bits are shifted into
the SSPSR and the address is compared against the
SSPADD. It is also compared to the general call
address and fixed in hardware.
FIGURE 9-15:
DS39582B-page 94
GCEN (SSPCON2<7>)
SSPOV (SSPCON<6>)
SDA
SCL
SSPIF
BF (SSPSTAT<0>)
GENERAL CALL ADDRESS
SUPPORT
S
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE
(7 OR 10-BIT ADDRESS MODE)
1
2
General Call Address
2
C bus is such that
3
2
4
C protocol. It
5
6
7
R/W = 0
8
If the general call address matches, the SSPSR is
transferred to the SSPBUF, the BF flag bit is set (eighth
bit) and on the falling edge of the ninth bit (ACK bit), the
SSPIF interrupt flag bit is set.
When the interrupt is serviced, the source for the inter-
rupt can be checked by reading the contents of the
SSPBUF. The value can be used to determine if the
address was device specific or a general call address.
In 10-bit mode, the SSPADD is required to be updated
for the second half of the address to match and the UA
bit is set (SSPSTAT<1>). If the general call address is
sampled when the GCEN bit is set, while the slave is
configured in 10-bit Address mode, then the second
half of the address is not necessary, the UA bit will not
be set and the slave will begin receiving data after the
Acknowledge (Figure 9-15).
ACK
Address is compared to general call address.
After ACK, set interrupt.
9
D7
1
D6
2
Cleared in software
SSPBUF is read
Receiving Data
D5
3
D4
4
2003 Microchip Technology Inc.
D3
5
D2
6
D1
7
D0
8
ACK
9
‘0’
‘1’