PIC16C621-20/P Microchip Technology, PIC16C621-20/P Datasheet - Page 67
![IC MCU OTP 1KX14 COMP 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16C621-20/P
Manufacturer Part Number
PIC16C621-20/P
Description
IC MCU OTP 1KX14 COMP 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C621-20/P
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C621-20/P
Manufacturer:
Microchip Technology
Quantity:
135
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
2003 Microchip Technology Inc.
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0 ≤ f ≤ 127
0 ≤ b < 7
skip if (f<b>) = 1
None
If bit 'b' in register 'f' is '1', then the
next instruction is skipped.
If bit 'b' is '1', then the next instruc-
tion fetched during the current
instruction execution, is discarded
and a NOP is executed instead,
making this a two-cycle instruction.
1
1(2)
Before Instruction
After Instruction
01
HERE
FALSE
TRUE
PC =
if FLAG<1> = 0,
PC =
if FLAG<1> = 1,
PC =
11bb
BTFSS
GOTO
•
•
•
address HERE
address FALSE
address TRUE
FLAG,1
PROCESS_CO
DE
bfff
ffff
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Call Subroutine
[ label ] CALL k
0 ≤ k ≤ 2047
(PC)+ 1→ TOS,
k → PC<10:0>,
(PCLATH<4:3>) → PC<12:11>
None
Call Subroutine. First, return
address (PC+1) is pushed onto
the stack. The eleven bit immedi-
ate address is loaded into PC bits
<10:0>. The upper bits of the PC
are loaded from PCLATH. CALL is
a two-cycle instruction.
1
2
Before Instruction
After Instruction
Clear f
[ label ] CLRF
0 ≤ f ≤ 127
00h → (f)
1 → Z
Z
The contents of register 'f' are
cleared and the Z bit is set.
1
1
Before Instruction
After Instruction
10
HERE
00
CLRF
PIC16C62X
PC = Address HERE
PC = Address THERE
TOS = Address HERE+1
FLAG_REG
FLAG_REG
Z
0kkk
CALL
0001
FLAG_REG
f
THER
E
DS30235J-page 65
kkkk
1fff
=
=
=
0x5A
0x00
1
kkkk
ffff