DSPIC33FJ32MC204-I/ML Microchip Technology, DSPIC33FJ32MC204-I/ML Datasheet - Page 156

IC DSPIC MCU/DSP 32K 44QFN

DSPIC33FJ32MC204-I/ML

Manufacturer Part Number
DSPIC33FJ32MC204-I/ML
Description
IC DSPIC MCU/DSP 32K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ32MC204-I/ML

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
44-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240002, DM330011, DM330021, MA330017
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ32MC204-I/ML
Manufacturer:
Microchip
Quantity:
229
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
14.1
Configure the Output Compare modes by setting the
appropriate Output Compare Mode bits (OCM<2:0>) in
the Output Compare Control register (OCxCON<2:0>).
Table 14-1
Compare modes.
compare operation for various modes. The user
TABLE 14-1:
FIGURE 14-2:
DS70283H-page 156
OCM<2:0>
Continuous Pulse Mode
000
001
010
011
100
101
110
111
Active-High One-Shot
Active-Low One-Shot
(OCM = 110 or 111)
Delayed One-Shot
Output Compare Modes
lists the different bit settings for the Output
(OCM = 011)
(OCM = 100)
Toggle Mode
(OCM = 101)
(OCM = 001)
(OCM = 010)
PWM Mode
Module Disabled
Active-Low One-Shot
Active-High One-Shot
Toggle Mode
Delayed One-Shot
Continuous Pulse mode
PWM mode without fault
protection
PWM mode with fault protection 0, if OCxR is zero
OUTPUT COMPARE MODES
TMRy
Figure 14-2
OUTPUT COMPARE OPERATION
OCxRS
OCxR
Mode
Output Compare
Mode enabled
illustrates the output
Current output is maintained
0, if OCxR is zero
1, if OCxR is non-zero
1, if OCxR is non-zero
Controlled by GPIO register
OCx Pin Initial State
Timer is reset on
period match
0
1
0
0
application must disable the associated timer when
writing to the output compare control registers to avoid
malfunctions.
Note:
See Section 13. “Output Compare”
(DS70209) in the “dsPIC33F/PIC24H
Family Reference Manual” (DS70209) for
OCxR and OCxRS register restrictions.
OCx Rising edge
OCx Falling edge
OCx Rising and Falling edge
OCx Falling edge
OCx Falling edge
No interrupt
OCFA Falling edge for OC1 to OC4
OCx Interrupt Generation
© 2011 Microchip Technology Inc.

Related parts for DSPIC33FJ32MC204-I/ML