PIC24HJ32GP202-I/SP Microchip Technology, PIC24HJ32GP202-I/SP Datasheet - Page 129

• Manufacturer Part Number: PIC24HJ32GP202-I/SP
• Description: IC PIC MCU FLASH 32K 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ32GP202-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 32KB (11K x 24)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164337 - MODULE SOCKET FOR PM3 40DIP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.0
13.1
When the OCM control bits (OCxCON<2:0>) are set to
‘100’, the selected output compare channel initializes
the OCx pin to the low state and generates a single
output pulse.
To generate a single output pulse, the following steps
are required. These steps assume timer source is
initially turned off though this is not a requirement for
the module operation.
1. Determine the instruction clock cycle time. Take
2. Calculate time to the rising edge of the output
3. Calculate the time to the falling edge of the pulse
4. Write the value computed in step 2 into the Output
5. Set Timer Period register, PRy, to a value equal to
6. Set the OCM bits to ‘100’ and the OCTSEL
7. Set the TON (TyCON<15>) bit to ‘1’, which
8.
© 2007 Microchip Technology Inc.
Note:
into account the frequency of the external clock to
the timer source (if one is used) and the timer
prescaler settings.
pulse relative to the TMRy start value (0000h).
based on the desired pulse width and the time to
the rising edge of the pulse.
Compare register, OCxR, and the value computed
in step 3 into the Output Compare Secondary reg-
ister, OCxRS.
or greater than value in OCxRS, the Output
Compare Secondary register.
(OCxCON<3>) bit to the desired timer source. The
OCx pin state will now be driven low.
enables the compare time base to count. Upon the
first match between TMRy and OCxR, the OCx pin
will be driven high.
When the incrementing timer, TMRy, matches the
Output Compare Secondary register, OCxRS, the
second and trailing edge (high-to-low) of the pulse
is driven onto the OCx pin. No additional pulses
are driven onto the OCx pin and it remains at low.
As a result of the second compare match event,
the OCxIF interrupt flag bit is set. This results in an
interrupt if it is enabled by setting the OCxIE bit.
For further information on peripheral interrupts,
refer to Section 6.0 “Interrupt Controller”.
to initiate another single pulse output, if needed;
and then issue a write to set the OCM bits to ‘100’.
Disabling and re-enabling the timer, and clearing
change the Timer and Compare register settings
OUTPUT COMPARE
Setup for Single Output Pulse
Generation
This data sheet summarizes the features
of
PIC24HJ16GP304 devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “PIC24H
Family Reference Manual”.
PIC24HJ32GP202/204 and PIC24HJ16GP304
the
PIC24HJ32GP202/204
and
Preliminary
13.2
When the OCM control bits (OCxCON<2:0>) are set to
‘101’, the selected output compare channel initializes
the OCx pin to the low state and generates output
pulses on each and every compare match event.
To configure the module to generate a continuous
stream of output pulses, the following steps are
required. These steps assume that the timer source is
initially turned off but this is not a requirement for the
module operation.
1. Determine the instruction clock cycle time. Take
2. Calculate time to the rising edge of the output
3. Calculate the time to the falling edge of the pulse,
4. Write the values computed in step 2 into the Out-
5. Set Timer Period register, PRy, to a value equal to
6. Set the OCM bits to ‘101’ and the OCTSEL bit to
7. Enable the compare time base by setting the TON
8. As a result of the second compare match event,
9. Steps 8 through 11 are repeated and a continuous
the TMRy register, are not required, but may be
advantageous for defining a pulse from a known
event time boundary.
into account the frequency of the external clock to
the timer source (if one is used) and the timer
prescaler settings.
pulse relative to the TMRy start value (0000h).
based on the desired pulse width and the time to
the rising edge of the pulse.
put Compare register, OCxR, and value computed
in step 3 into the Output Compare Secondary reg-
ister, OCxRS.
or greater than value in OCxRS, the Output
Compare Secondary Register.
the desired timer source. The OCx pin state will
now be driven low.
(TyCON<15>) bit to ‘1’. Upon the first match
between TMRy and OCxR, the OCx pin will be
driven high.
When the compare time base, TMRy, matches the
Output Compare Secondary register, OCxRS, the
second and trailing edge (high-to-low) of the pulse
is driven onto the OCx pin.
the OCxIF interrupt flag bit is set.
When the compare time base and the value in its
respective Timer Period register match, the TMRy
register resets to 0x0000 and resumes counting.
stream of pulses is generated, indefinitely. The
OCxIF flag is set on each OCxRS-TMRy compare
match event.
The output compare module does not have to be
disabled after the falling edge of the output
pulse. Another pulse can be initiated by rewriting
the value of the OCxCON register.
Setup for Continuous Output
Pulse Generation
DS70289A-page 127