PIC16C716-20I/P Microchip Technology, PIC16C716-20I/P Datasheet - Page 44

• Manufacturer Part Number: PIC16C716-20I/P
• Description: IC MCU OTP 2KX14 A/D PWM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C716-20I/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 bit
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16C712/716
7.3
In Pulse Width Modulation (PWM) mode, the CCP1 pin
produces up to a 10-bit resolution PWM output. Since
the CCP1 pin is multiplexed with the PORTB data latch,
the TRISCCP<2> bit must be cleared to make the
CCP1 pin an output.
Figure 7-5 shows a simplified block diagram of the
CCP module in PWM mode.
For a step by step procedure on how to set up the CCP
module for PWM operation, see Section 7.3.3 “Set-
Up for PWM Operation”.
FIGURE 7-5:
A PWM output (Figure 7-6) has a time base (period)
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period (1/
period).
FIGURE 7-6:
DS41106B-page 42
Note 1: 8-bit timer is concatenated with 2-bit internal Q clock
Note:
CCPR1L
CCPR1H (Slave)
Comparator
Duty cycle registers
TMR2 = PR2
PR2
or 2 bits of the prescaler to create 10-bit time base.
TMR2
Comparator
PWM Mode
Duty Cycle
Clearing the CCP1CON register will force
the CCP1 PWM output latch to the default
low level. This is neither the PORTB I/O
data latch nor the DATACCP latch.
Period = PR2+1
(Note 1)
TMR2 = Duty Cycle (CCPR1H)
Clear Timer,
CCP1 pin and
latch D.C.
SIMPLIFIED PWM BLOCK
DIAGRAM
PWM OUTPUT
TMR2 = PR2
CCP1CON<5:4>
R
S
Q
TRISCCP<2>
RB3/CCP1
7.3.1
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following formula:
PWM frequency is defined as 1 / [PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP1 pin is set (exception: if PWM duty
• The PWM duty cycle is latched from CCPR1L into
7.3.2
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR1L:CCP1CON<5:4>. The following equation is
used to calculate the PWM duty cycle in time:
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPR1H until after a match between PR2 and TMR2
occurs (i.e., the period is complete). In PWM mode,
CCPR1H is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
When the CCPR1H and 2-bit latch match TMR2
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
Maximum PWM resolution (bits) for a given PWM
frequency:
For an example PWM period and duty cycle calcula-
tion, see the PICmicro
(DS33023).
cycle = 0%, the CCP1 pin will not be set)
CCPR1H
Note:
Note:
PWM duty cycle = (CCPR1L:CCP1CON<5:4>) •
PWM period = [(PR2) + 1] • 4 • T
PWM PERIOD
The Timer2 postscaler (see Section 6.0
“Timer2 Module”) is not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
PWM DUTY CYCLE
If the PWM duty cycle value is longer than
the PWM period the CCP1 pin will not be
cleared.
=
(TMR2 prescale value)
log
log(2)
Tosc • (TMR2 prescale value)
(
®
Mid-Range Reference Manual,
© 2005 Microchip Technology Inc.
F
F
OSC
PWM
)
OSC
bits
•