PIC24F08KA102-I/SS Microchip Technology, PIC24F08KA102-I/SS Datasheet - Page 156
![IC PIC MCU FLASH 8K 28-SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC24F08KA102-I/SS
Manufacturer Part Number
PIC24F08KA102-I/SS
Description
IC PIC MCU FLASH 8K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MA240017.pdf
(254 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F16KA101-ISS.pdf
(18 pages)
Specifications of PIC24F08KA102-I/SS
Core Size
16-Bit
Program Memory Size
8KB (2.75K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC24
No. Of I/o's
24
Eeprom Memory Size
512Byte
Ram Memory Size
1.5KB
Cpu Speed
32MHz
No. Of Timers
3
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F08KA102-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 156 of 254
- Download datasheet (4Mb)
PIC24F16KA102 FAMILY
REGISTER 19-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER
REGISTER 19-2:
DS39927B-page 154
bit 7-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-5
bit 4-3
bit 2-1
bit 0
Note 1:
U-0
U-0
—
—
2:
3:
The RCFGCAL register is only affected by a POR.
A write to the RTCEN bit is only allowed when RTCWREN = 1.
This bit is read-only; it is cleared to ‘0’ on a write to the lower half of the MINSEC register.
To enable the actual RTCC output, the RTCOE (RCFGCAL<10>) bit needs to be set.
CAL<7:0>: RTC Drift Calibration bits
01111111 = Maximum positive adjustment; adds 508 RTC clock pulses every one minute
.
.
.
01111111 = Minimum positive adjustment; adds 4 RTC clock pulses every one minute
00000000 = No adjustment
11111111 = Minimum negative adjustment; subtracts 4 RTC clock pulses every one minute
.
.
.
10000000 = Maximum negative adjustment; subtracts 512 RTC clock pulses every one minute
Unimplemented: Read as ‘0’
Described in Section 15.0 “Output Compare” and Section 17.0 “Inter-Integrated Circuit (I
RTSECSEL<1:0>: RTCC Seconds Clock Output Select bits
11 = Reserved; do not use
10 = RTCC source clock is selected for the RTCC pin (can be LPRC or SOSC, depending on the
01 = RTCC seconds clock is selected for the RTCC pin
00 = RTCC alarm pulse is selected for the RTCC pin
Unimplemented: Read as ‘0’
U-0
U-0
—
—
RTCCKSEL (FDS<5>) bit setting)
PADCFG1: PAD CONFIGURATION CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
SMBUSDEL
R/W-0
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OC1TRIS
R/W-0
U-0
—
(1)
RTSECSEL1
R/W-0
U-0
—
© 2009 Microchip Technology Inc.
(1)
x = Bit is unknown
RTSECSEL0
R/W-0
(1)
U-0
—
(CONTINUED)
(1)
2
C™)”.
U-0
U-0
—
—
bit 8
bit 0
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