PIC16F1827-I/SO Microchip Technology, PIC16F1827-I/SO Datasheet - Page 93

• Manufacturer Part Number: PIC16F1827-I/SO
• Description: IC PIC MCU FLASH 4K 18-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1827-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 18SOIC W
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

8.6.8
The PIR3 register contains the interrupt flag bits, as
shown in
REGISTER 8-8:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
Register
This register is only available on PIC16(L)F1827.
PIR3 REGISTER
Unimplemented: Read as ‘0’
CCP4IF: CCP4 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP3IF: CCP3 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR6IF: TMR6 to PR6 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
TMR4IF: TMR4 to PR4 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
8-8.
U-0
—
PIR3: PERIPHERAL INTERRUPT REQUEST REGISTER 3
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
CCP4IF
R/W-0/0
CCP3IF
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
TMR6IF
Note:
PIC16(L)F1826/27
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
U-0
—
software
(1)
R/W-0/0
TMR4IF
should
DS41391D-page 93
ensure
U-0
—
bit 0
the