PIC12C509A-04/SN Microchip Technology, PIC12C509A-04/SN Datasheet - Page 50

• Manufacturer Part Number: PIC12C509A-04/SN
• Description: IC MCU OTP 1KX12 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C509A-04/SN

• Core Size: 8-Bit
• Program Memory Size: 1.5KB (1K x 12)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 41 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (3.9mm Width)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 41Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Digital Ic Case Style: SOIC
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 41 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 1
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: DVMCPA, ICE2000
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1046 - ADAPTER 8-SOIC TO 8-DIP309-1045 - ADAPTER 8-SOIC TO 8-DIP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC12C5XX
BSF
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
BTFSC
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
DS40139E-page 50
Before Instruction
After Instruction
Before Instruction
After Instruction
FLAG_REG = 0x0A
FLAG_REG = 0x8A
PC
if FLAG<1>
PC
if FLAG<1>
PC
Bit Set f
[ label ] BSF
0
0
1
Bit ’b’ in register ’f’ is set.
1
1
BSF
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
If bit ’b’ in register ’f’ is 0 then the next
instruction is skipped.
If bit ’b’ is 0 then the next instruction
fetched during the current instruction
execution is discarded, and an NOP is
executed instead, making this a 2 cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
0110
0101
f
b
f
b
=
=
=
=
=
(f<b>)
31
31
7
7
FLAG_REG,
BTFSC
GOTO
•
•
•
address (HERE)
0,
address (TRUE);
1,
address(FALSE)
bbbf
bbbf
f,b
FLAG,1
PROCESS_CODE
ffff
ffff
7
BTFSS
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Before Instruction
After Instruction
PC
If FLAG<1>
PC
if FLAG<1>
PC
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
If bit ’b’ in register ’f’ is ’1’ then the next
instruction is skipped.
If bit ’b’ is ’1’, then the next instruction
fetched during the current instruction
execution, is discarded and an NOP is
executed instead, making this a 2 cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
0111
f
b < 7
=
=
=
=
=
31
1999 Microchip Technology Inc.
BTFSS
GOTO
address (HERE)
0,
address (FALSE);
1,
address (TRUE)
bbbf
FLAG,1
PROCESS_CODE
ffff